SBOS058B December   1997  – August 2024 OPA134 , OPA2134 , OPA4134

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information - OPA134
    5. 5.5 Thermal Information - OPA2134
    6. 5.6 Thermal Information - OPA4134
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Feature Description
      1. 6.2.1 Total Harmonic Distortion
      2. 6.2.2 Distortion Measurements
      3. 6.2.3 Source Impedance and Distortion
      4. 6.2.4 Phase Reversal Protection
      5. 6.2.5 Output Current Limit
    3. 6.3 Functional Block Diagram
    4. 6.4 Device Functional Modes
      1. 6.4.1 Noise Performance
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Operating Voltage
      2. 7.1.2 Offset Voltage Trim
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Analog Filter Designer
        2. 8.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 8.1.1.3 TI Reference Designs
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • D|8
  • P|8
サーマルパッド・メカニカル・データ
発注情報

ESD Ratings

VALUE UNIT
OPA134 in SOIC and PDIP Packages, and OPA2134 in PDIP Package
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
OPA2134 in SOIC Package
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
OPA4134 in SOIC Package
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Electrostatic discharge Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±200
JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.