JAJSDC8F June   2017  – March 2021 OPA145 , OPA2145

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA145
    5. 6.5 Thermal Information: OPA2145
    6. 6.6 Electrical Characteristics: VS = 4.5 V to 36 V; ±2.25 V to ±18 V
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Capacitive Load and Stability
      2. 7.3.2 Output Current Limit
      3. 7.3.3 Noise Performance
      4. 7.3.4 Basic Noise Calculations
      5. 7.3.5 Phase-Reversal Protection
      6. 7.3.6 Electrical Overstress
      7. 7.3.7 EMI Rejection
      8. 7.3.8 EMIRR +IN Test Configuration
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 System Examples
      1. 8.3.1 16-Bit, 100-kSPS, Fully Differential Transimpedance Imaging and Measurement
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI™ SImulation Software (Free Download)
        2. 11.1.1.2 WEBENCH Filter Designer Tool
        3. 11.1.1.3 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

GUID-B4918EE0-1026-4770-A2DB-82E83EE0724D-low.gifFigure 5-1 OPA145: D (8-Pin SOIC) and
DGK (8-Pin VSSOP) Packages, Top View
GUID-DC5DD996-5B90-4E5F-9948-299544AD2B75-low.gifFigure 5-2 OPA145: DBV (5-Pin SOT-23) Package, Top View
Table 5-1 Pin Functions: OPA145
PIN I/O DESCRIPTION
NAME OPA145
D (SOIC),
DGK (VSSOP)		 DBV (SOT-23)
–IN 2 4 I Inverting input
+IN 3 3 I Noninverting input
NC 1, 5, 8 — — No internal connection (can be left floating)
OUT 6 1 O Output
V– 4 2 — Negative (lowest) power supply
V+ 7 5 — Positive (highest) power supply
GUID-1105425F-FF67-451D-AC89-4A929538AC10-low.gifFigure 5-3 OPA2145: D (8-Pin SOIC) and DGK (8-Pin VSSOP) Packages, Top View
Table 5-2 Pin Functions: OPA2145
PIN I/O DESCRIPTION
NAME OPA2145
D (SOIC),
DGK (VSSOP)
–IN A 2 I Inverting input channel A
+IN A 3 I Noninverting input channel A
–IN B 6 I Inverting input channel B
+IN B 5 I Noninverting input channel B
OUT A 1 O Output channel A
OUT B 7 O Output channel B
V– 4 — Negative supply
V+ 8 — Positive supply