JAJSCN7A November   2016  – June 2017 OPA2172-Q1 , OPA4172-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 EMI Rejection
      2. 8.3.2 Phase-Reversal Protection
      3. 8.3.3 Capacitive Load and Stability
    4. 8.4 Device Functional Modes
      1. 8.4.1 Common-Mode Voltage Range
      2. 8.4.2 Electrical Overstress
      3. 8.4.3 Overload Recovery
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Capacitive Load Drive Solution Using an Isolation Resistor
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Bidirectional Current Source
      3. 9.2.3 JFET-Input Low-Noise Amplifier
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 開発サポート
        1. 12.1.1.1 TINA-TI(無料のダウンロード・ソフトウェア)
    2. 12.2 ドキュメントのサポート
      1. 12.2.1 関連資料
    3. 12.3 関連リンク
    4. 12.4 ドキュメントの更新通知を受け取る方法
    5. 12.5 コミュニティ・リソース
    6. 12.6 商標
    7. 12.7 静電気放電に関する注意事項
    8. 12.8 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Detailed Description

Overview

The OPAx172-Q1 family of operational amplifiers provide high overall performance, making the devices ideal for many general-purpose applications. The excellent offset drift of only 1.5 µV/°C (maximum) provides excellent stability over the entire temperature range. In addition, the family offers very good overall performance with high CMRR, PSRR, AOL, and superior THD.

The Functional Block Diagram section shows the simplified diagram of the OPA172-Q1 design. The design topology is a highly-optimized, three-stage amplifier with an active-feedforward gain stage.

Functional Block Diagram

OPA2172-Q1 OPA4172-Q1 FBD_OPA172Q1.gif

Feature Description

EMI Rejection

The OPAx172-Q1 uses integrated electromagnetic interference (EMI) filtering to reduce the effects of EMI from sources such as wireless communications and densely-populated boards with a mix of analog signal chain and digital components. EMI immunity can be improved with circuit design techniques; the OPAx172-Q1 benefits from these design improvements. Texas Instruments has developed the ability to accurately measure and quantify the immunity of an operational amplifier over a broad frequency spectrum extending from 10 MHz to 6 GHz. Figure 42 shows the results of this testing on the OPAx172-Q1. Table 3 shows the EMIRR IN+ values for the OPAx172-Q1 at particular frequencies commonly encountered in real-world applications. Applications listed in Table 3 can be centered on or operated near the particular frequency shown. Detailed information can also be found in the EMI Rejection Ratio of Operational Amplifiers application report (SBOA128), available for download from www.ti.com.

OPA2172-Q1 OPA4172-Q1 C020_SBOS618.png Figure 42. EMIRR Testing

Table 3. OPAx172-Q1 EMIRR IN+ for Frequencies of Interest

FREQUENCY APPLICATION OR ALLOCATION EMIRR IN+
400 MHz Mobile radio, mobile satellite, space operation, weather, radar, ultrahigh frequency (UHF) applications 47.6 dB
900 MHz Global system for mobile communications (GSM) applications, radio communication, navigation, GPS (to 1.6 GHz), GSM, aeronautical mobile, UHF applications 58.5 dB
1.8 GHz GSM applications, mobile personal communications, broadband, satellite, L-band (1 GHz to 2 GHz) 68 dB
2.4 GHz 802.11b, 802.11g, 802.11n, Bluetooth®, mobile personal communications, industrial, scientific and medical (ISM) radio band, amateur radio and satellite, S-band (2 GHz to 4 GHz) 69.2 dB
3.6 GHz Radiolocation, aero communication and navigation, satellite, mobile, S-band 82.9 dB
5 GHz 802.11a, 802.11n, aero communication and navigation, mobile communication, space and satellite operation, C-band (4 GHz to 8 GHz) 114 dB

Phase-Reversal Protection

The OPAx172-Q1 family has internal phase-reversal protection. Many op amps exhibit a phase reversal when the input is driven beyond the linear common-mode range. This condition is most often encountered in noninverting circuits when the input is driven beyond the specified common-mode voltage range, causing the output to reverse into the opposite rail. The input of the OPAx172-Q1 prevents phase reversal with excessive common-mode voltage. Instead, the appropriate rail limits the output voltage. This performance is shown in Figure 43.

OPA2172-Q1 OPA4172-Q1 C014_SBOS809.gif Figure 43. No Phase Reversal

Capacitive Load and Stability

The dynamic characteristics of the OPAx172-Q1 are optimized for commonly-used operating conditions. The combination of low closed-loop gain and high capacitive loads decreases the phase margin of the amplifier and can lead to gain peaking or oscillations. As a result, heavier capacitive loads must be isolated from the output. The simplest way to achieve this isolation is to add a small resistor (for example, ROUT = 50 Ω) in series with the output. Figure 44 and Figure 45 show graphs of small-signal overshoot versus capacitive load for several values of ROUT. See the Feedback Plots Define Op Amp AC Performance application bulletin (SBOA015), available for download from www.ti.com, for details of analysis techniques and application circuits.

OPA2172-Q1 OPA4172-Q1 C022_SBOS809.gif Figure 44. Small-Signal Overshoot vs Capacitive Load (100-mV Output Step)
OPA2172-Q1 OPA4172-Q1 C021_SBOS809.gif Figure 45. Small-Signal Overshoot vs Capacitive Load (100-mV Output Step)

Device Functional Modes

Common-Mode Voltage Range

The input common-mode voltage range of the OPAx172-Q1 series extends 100 mV below the negative rail and within 2 V of the top rail for normal operation.

This device can operate with a full rail-to-rail input 100 mV beyond the top rail, but with reduced performance within 2 V of the top rail. The typical performance in this range is summarized in Table 4.

Table 4. Typical Performance Range (VS = ±18 V)

MIN TYP MAX UNIT
Input common-mode voltage (V+) – 2 (V+) + 0.1 V
Offset voltage 5 mV
Offset voltage vs temperature (TA = –40°C to +125°C) 10 µV/°C
Common-mode rejection 70 dB
Open-loop gain 60 dB
Gain bandwidth product (GBP) 4 MHz
Slew rate 4 V/µs
Noise at f = 1 kHz 22 nV/√Hz

Electrical Overstress

Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress. These questions tend to focus on the device inputs, but can involve the supply voltage terminals or even the output terminal. Each of these different terminal functions have electrical stress limits determined by the voltage breakdown characteristics of the particular semiconductor fabrication process and specific circuits connected to the terminal. Additionally, internal electrostatic discharge (ESD) protection is built into these circuits for protection from accidental ESD events both before and during product assembly.

A good understanding of this basic ESD circuitry and the relevance to an electrical overstress event is helpful. Figure 46 illustrates the ESD circuits contained in the OPAx172-Q1 (indicated by the dashed line area). The ESD protection circuitry involves several current-steering diodes connected from the input and output terminals and routed back to the internal power-supply lines, where the diodes meet at an absorption device internal to the operational amplifier. This protection circuitry is intended to remain inactive during normal circuit operation.

OPA2172-Q1 OPA4172-Q1 ai_esd_OPA172Q1.gif Figure 46. Equivalent Internal ESD Circuitry Relative to a Typical Circuit Application

An ESD event produces a short-duration, high-voltage pulse that is transformed into a short-duration, high-current pulse when discharging through a semiconductor device. The ESD protection circuits are designed to provide a current path around the operational amplifier core to prevent damage. The energy absorbed by the protection circuitry is then dissipated as heat.

When an ESD voltage develops across two or more amplifier device terminals, current flows through one or more steering diodes. Depending on the path that the current takes, the absorption device can activate. The absorption device has a trigger, or threshold voltage, that is above the normal operating voltage of the OPAx172-Q1 but below the device breakdown voltage level. When this threshold is exceeded, the absorption device quickly activates and clamps the voltage across the supply rails to a safe level.

When the operational amplifier connects into a circuit (as shown in Figure 46), the ESD protection components are intended to remain inactive and do not become involved in the application circuit operation. However, circumstances can arise where an applied voltage exceeds the operating voltage range of a given terminal. If this condition occurs, there is a risk that some internal ESD protection circuits can turn on and conduct current. Any such current flow occurs through steering-diode paths and rarely involves the absorption device.

Figure 46 shows a specific example where the input voltage (VIN) exceeds the positive supply voltage (+VS) by 500 mV or more. Much of what happens in the circuit depends on the supply characteristics. If +VS can sink the current, one of the upper input steering diodes conducts and directs current to +VS. Excessively high current levels can flow with increasingly higher VIN. As a result, the data sheet specifications recommend that applications limit the input current to 10 mA.

If the supply is not capable of sinking the current, VIN can begin sourcing current to the operational amplifier, and then take over as the source of positive supply voltage. The danger in this case is that the voltage can rise to levels that exceed the operational amplifier absolute maximum ratings.

Another common question involves what happens to the amplifier if an input signal is applied to the input when the power supplies +VS or –VS are at 0 V. Again, this question depends on the supply characteristic when at 0 V, or at a level below the input-signal amplitude. If the supplies appear as high impedance, then the input source supplies the operational amplifier current through the current-steering diodes. This state is not a normal bias condition; most likely, the amplifier does not operate normally. If the supplies are low impedance, then the current through the steering diodes can become quite high. The current level depends on the ability of the input source to deliver current, and any resistance in the input path.

If there is any uncertainty about the ability of the supply to absorb this current, add external zener diodes to the supply terminals; see Figure 46. Select the zener voltage so that the diode does not turn on during normal operation. However, the zener voltage must be low enough so that the zener diode conducts if the supply terminal begins to rise above the safe-operating, supply-voltage level.

The OPAx172-Q1 input terminals are protected from excessive differential voltage with back-to-back diodes; see Figure 46. In most circuit applications, the input protection circuitry has no effect. However, in low-gain or G = 1 circuits, fast-ramping input signals can forward-bias these diodes because the output of the amplifier cannot respond rapidly enough to the input ramp. If the input signal is fast enough to create this forward-bias condition, limit the input signal current to 10 mA or less. If the input signal current is not inherently limited, an input series resistor can be used to limit the input signal current. This input series resistor degrades the low-noise performance of the OPAx172-Q1. Figure 46 illustrates an example configuration that implements a current-limiting feedback resistor.

Overload Recovery

Overload recovery is defined as the time required for the op amp output to recover from the saturated state to the linear state. The output devices of the op amp enter the saturation region when the output voltage exceeds the rated operating voltage, either resulting from the high input voltage or the high gain. After the device enters the saturation region, the charge carriers in the output devices need time to return back to the normal state. After the charge carriers return back to the equilibrium state, the device begins to slew at the normal slew rate. Thus, the propagation delay in case of an overload condition is the sum of the overload recovery time and the slew time. The overload recovery time for the OPAx172-Q1 is approximately 200 ns.