JAJSD63A June   2017  – June 2018 OPA180-Q1 , OPA2180-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     低ノイズ (ピーク・ツー・ピークのノイズ = 250nV)
  4. 改訂履歴
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions: OPA180-Q1
    2.     Pin Functions: OPA2180-Q1
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: OPA180-Q1
    5. 7.5 Thermal Information: OPA2180-Q1
    6. 7.6 Electrical Characteristics: VS = ±2 V to ±18 V (VS = 4 V to 36 V)
    7. 7.7 Typical Characteristics: Table of Graphs
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Characteristics
      2. 8.3.2 EMI Rejection
      3. 8.3.3 Phase-Reversal Protection
      4. 8.3.4 Capacitive Load and Stability
      5. 8.3.5 Electrical Overstress
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Bipolar ±10-V Analog Output from a Unipolar Voltage Output DAC
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Component Selection
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Discrete INA + Attenuation
      3. 9.2.3 RTD Amplifier
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 関連リンク
    2. 12.2 商標
    3. 12.3 静電気放電に関する注意事項
    4. 12.4 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics: VS = ±2 V to ±18 V (VS = 4 V to 36 V)

at TA = 25°C, RL = 10 kΩ connected to VS / 2, and VCOM = VOUT = VS / 2, (unless otherwise noted)
PARAMETER CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VIO Input offset voltage 15 75 μV
dVIO/dT Input offset voltage drift TA = –40°C to +125°C 0.1 0.35 μV/°C
PSRR Power-supply rejection ratio VS = 4 V to 36 V
VCM = VS / 2
0.1 0.5 μV/V
TA = –40°C to +125°C,
VS = 4 V to 36 V
VCM = VS / 2
0.5 μV/V
Long-term stability 4(1) μV
Channel separation, DC 1 μV/V
INPUT BIAS CURRENT
IIB Input bias current OPA2180-Q1 ±0.25 ±1 nA
OPA2180-Q1:
TA = –40°C to +105°C
18 ±5 nA
OPA180-Q1 ±0.25 ±1.7 nA
OPA180-Q1:
TA = –40°C to +125°C
18 ±6 nA
IIO Input offset current OPA2180-Q1 ±0.5 ±2 nA
OPA2180-Q1:
TA = –40°C to +105°C
6 ±2.5 nA
OPA180-Q1 ±3.4 nA
OPA180-Q1:
TA = –40°C to +125°C
6 ±3 nA
NOISE
Input voltage noise ƒ = 0.1 Hz to 10 Hz 0.25 μVPP
en Input voltage noise density ƒ = 1 kHz 10 nV/√Hz
in Input current noise density ƒ = 1 kHz 10 fA/√Hz
INPUT VOLTAGE RANGE
VCM Common-mode voltage range V– (V+) – 1.5 V
CMRR Common-mode rejection ratio (V–) < VCM < (V+) – 1.5 V 104 114 dB
TA = –40°C to +125°C
(V–) + 0.5 V < VCM < (V+) – 1.5 V
100 104 dB
INPUT IMPEDANCE
zid Differential 100 || 6 MΩ || pF
zic Common-mode 6 || 9.5 1012 Ω || pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain (V–) + 500 mV < VO < (V+) – 500 mV
RL = 10 kΩ
110 120 dB
TA = –40°C to +125°C
(V–) + 500 mV < VO < (V+) – 500 mV
RL = 10 kΩ
104 114 dB
FREQUENCY RESPONSE
GBW Gain bandwidth product 2 MHz
SR Slew rate G = 1 0.8 V/μs
ts Settling time 0.1% VS = ±18 V, G = 1, 10-V step 22 μs
0.01% VS = ±18 V, G = 1, 10-V step 30 μs
tor Overload recovery time VIN × G = VS 1 μs
THD+N Total harmonic distortion + noise ƒ = 1 kHz, G = 1, VOUT = 1 VRMS 0.0001%
OUTPUT
Voltage output swing from rail No load 8 18 mV
RL = 10 kΩ 250 300 mV
TA = –40°C to +125°C
RL = 10 kΩ
325 360 mV
IOS Short-circuit current ±18 mA
ro Output resistance (open loop) ƒ = 2 MHz, IO = 0 mA 120 Ω
CLOAD Capacitive load drive 1 nF
POWER SUPPLY
VS Operating voltage range ±2 (or 4) ±18 (or 36) V
IQ Quiescent current (per amplifier) 450 525 μA
TA = –40°C to +125°C
IO = 0 mA
600 μA
TEMPERATURE
Specified range –40 105 °C
Operating range –40 105 °C
1000-hour life test at 125°C demonstrated randomly distributed variation in the range of measurement limits, or approximately 4 μV.