JAJSNV3C
june 2022 – july 2023
OPA186
,
OPA2186
,
OPA4186
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information: OPA186
6.5
Thermal Information: OPA2186
6.6
Thermal Information: OPA4186
6.7
Electrical Characteristics
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Rail-to-Rail Inputs
7.3.2
Phase-Reversal Protection
7.3.3
Input Bias Current Clock Feedthrough
7.3.4
EMI Rejection
7.3.4.1
EMIRR +IN Test Configuration
7.3.5
Electrical Overstress
7.3.6
MUX-Friendly Inputs
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.1.1
Basic Noise Calculations
8.2
Typical Applications
8.2.1
High-Side Current Sensing
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curve
8.2.2
Bridge Amplifier
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
Development Support
9.1.1.1
PSpice® for TI
9.1.1.2
TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
9.2
Documentation Support
9.2.1
Related Documentation
9.3
ドキュメントの更新通知を受け取る方法
9.4
サポート・リソース
9.5
Trademarks
9.6
静電気放電に関する注意事項
9.7
用語集
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
D|8
MSOI002K
DDF|8
MPDS569D
サーマルパッド・メカニカル・データ
D|8
QFND304D
発注情報
jajsnv3c_oa
jajsnv3c_pm
8.2.1
High-Side Current Sensing
Figure 8-2
High-Side Current Monitor