SBOS432G August   2008  – August 2016 OPA2330 , OPA330 , OPA4330

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configurations and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: OPA330
    5. 7.5 Thermal Information: OPA2330
    6. 7.6 Thermal Information: OPA4330
    7. 7.7 Electrical Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Operating Voltage
      2. 9.1.2 Input Voltage
      3. 9.1.3 Input Differential Voltage
      4. 9.1.4 Internal Offset Correction
      5. 9.1.5 EMI Susceptibility and Input Filtering
      6. 9.1.6 Achieving Output Swing to the Operational Amplifier Negative Rail
      7. 9.1.7 Photosensitivity
    2. 9.2 Typical Application
      1. 9.2.1 Bidirectional Current-Sensing
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
    3. 9.3 System Examples
      1. 9.3.1 Single Operational Amplifier Bridge Amplifier
      2. 9.3.2 Low-Side Current Monitor
      3. 9.3.3 Thermistor Measurement
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 VQFN and SON Packages
      2. 11.1.2 VQFN and SON Layout Guidelines
      3. 11.1.3 OPA330 DSBGA
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 TINA-TI™ (Free Software Download)
        2. 12.1.1.2 DIP Adapter EVM
        3. 12.1.1.3 Universal Operational Amplifier EVM
        4. 12.1.1.4 TI Precision Designs
        5. 12.1.1.5 WEBENCH Filter Designer
        6. 12.1.1.6 Related Parts
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resources
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • D|8
  • DGK|8
  • DRB|8
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configurations and Functions

OPA330: D Package
8-Pin SOIC
Top View
OPA330 OPA2330 OPA4330 po_333_so8_bos351.gif
1. NC denotes no internal connection.
OPA330: DBV Package
5-Pin SOT-23
Top View
OPA330 OPA2330 OPA4330 po_333_sot23_bos351.gif
OPA330: DCK Package
5-Pin SC70
Top View
OPA330 OPA2330 OPA4330 po_333_sc70_bos351.gif
OPA330: YFF Package
5-Pin DSBGA
Top View
OPA330 OPA2330 OPA4330 po_wcsp_bos432.gif

Pin Functions: OPA330

PIN I/O DESCRIPTION
NAME SOIC SOT-23 SC70 DSBGA
–IN 2 4 3 C1 I Negative (inverting) input
+IN 3 3 1 A1 I Positive (noninverting) input
NC 1, 5, 8 — — — — No internal connection (can be left floating)
OUT 6 1 4 C3 O Output
V– 4 2 2 — — Negative (lowest) power supply
V+ 7 5 5 — — Positive (highest) power supply
VS– — — — B2 — Negative (lowest) power supply
VS+ — — — A3 — Positive (highest) power supply
OPA2330: D and DGK Packages
8-Pin SOIC and 8-Pin VSSOP
Top View
OPA330 OPA2330 OPA4330 po_2333_so_msop_bos351.gif
OPA2330: DRB Package
8-Pin SON
Top View
OPA330 OPA2330 OPA4330 po_2333_dfn8_bos351.gif
1. Connect thermal die pad to V–.

Pin Functions: OPA2330

PIN I/O DESCRIPTION
NAME SOIC,
VSSOP		 SON
–IN A 2 2 I Negative (inverting) input signal, channel A
+IN A 3 3 I Positive (noninverting) input signal, channel A
–IN B 6 6 I Negative (inverting) input signal, channel B
+IN B 5 5 I Positive (noninverting) input signal, channel B
OUT A 1 1 O Output channel A
OUT B 7 7 O Output channel B
V– 4 4 — Negative (lowest) power supply
V+ 8 8 — Positive (highest) power supply
OPA4330: D Package
14-Pin SOIC
Top View
OPA330 OPA2330 OPA4330 po_so14_bos432.gif
OPA4330: PW Package
14-Pin TSSOP
Top View
OPA330 OPA2330 OPA4330 po_tssop14_bos432.gif
OPA4330: RGY Package
14-Pin VQFN
Top View
OPA330 OPA2330 OPA4330 po_qfn14_bos432.gif
1. Connect thermal die pad to V–.

Pin Functions: OPA4330

PIN I/O DESCRIPTION
NAME SOIC TSSOP VQFN
–IN A 2 2 2 I Negative (inverting) input signal, channel A
+IN A 3 3 3 I Positive (noninverting) input signal, channel A
–IN B 6 6 6 I Negative (inverting) input signal, channel B
+IN B 5 5 5 I Positive (noninverting) input signal, channel B
–IN C 9 9 9 I Negative (inverting) input signal, channel C
+IN C 10 10 10 I Positive (noninverting) input signal, channel C
–IN D 13 13 13 I Negative (inverting) input signal, channel D
+IN D 12 12 12 I Positive (noninverting) input signal, channel D
OUT A 1 1 1 O Output channel A
OUT B 7 7 7 O Output channel B
OUT C 8 8 8 O Output channel C
OUT D 14 14 14 O Output channel D
V– 11 11 11 — Negative (lowest) power supply
V+ 4 4 4 — Positive (highest) power supply