JAJSIN9B December   2008  – February 2020 OPA2333-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      0.1Hz～10Hzのノイズ
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: VS = 1.8 V to 5.5 V
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Rail-to-Rail Input Voltage
      2. 7.3.2 Internal Offset Correction
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Achieving Output Swing to the Op Amp Negative Rail
    2. 8.2 Typical Application
      1. 8.2.1 High-Side Voltage-to-Current (V-I) Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
        4. 8.2.1.4 Single Op Amp Bridge Amplifier
        5. 8.2.1.5 Low-Side Current Monitor
        6. 8.2.1.6 High-Side Current Monitor
        7. 8.2.1.7 Precision Instrumentation Amplifier
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics: VS = 1.8 V to 5.5 V

At TA = 25°C, RL = 10 kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2 (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage VS = 5 V 2 10 μV
VS = 5 V, TA = –40°C to +125°C 15 μV
dVOS/dT VOS drift VS = 5 V, TA = –40°C to 125°C 0.02 0.05 μV/°C
PSRR Power-supply rejection ratio VS = 1.8 V to 5.5 V,
TA = –40°C to +125°C		 1 6 μV/V
Long-term stability(1) 1(1) µV
Channel separation, dc 0.1 μV/V
INPUT BIAS CURRENT
IB Input bias current ±70 ±200 pA
TA = –40°C to +125°C ±150 pA
IOS Input offset current ±140 ±400 pA
NOISE
Input voltage noise f = 0.01 Hz to 1 Hz 0.3 μVPP
f = 0.1 Hz to 10 Hz 1.1 μVPP
in Input current noise f = 10 Hz 100 fA/√Hz
INPUT VOLTAGE
VCM Common-mode supply voltage (V–) – 0.1 (V+) + 0.1 V
CMRR Common-mode rejection ratio (V–) – 0.1 V < VCM < (V+) + 0.1 V,
TA = –40°C to +125°C		 102 130 dB
INPUT CAPACITANCE
Differential 2 pF
Common-mode 4 pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain (V–) + 100 mV < VO < (V+) – 100 mV, RL = 10 kΩ, TA = –40°C to +125°C 104 130 dB
FREQUENCY RESPONSE
GBW Gain-bandwidth product CL = 100 pF 350 kHz
SR Slew rate G = 1 0.16 V/μs
OUTPUT
Voltage output swing from rail RL = 10 kΩ 30 50 mV
RL = 10 kΩ, TA = –40°C to +125°C 85 mV
ISC Short-circuit current ±5 mA
CL Capacitive load drive (2)
Open-loop output impedance f = 350 kHz, IO = 0 A 2 kΩ
POWER SUPPLY
IQ Quiescent current per amplifier IO = 0 A 17 25 μA
IO = 0 A, TA = –40°C to +125°C 30 μA
Turn-on time VS = 5 V 100 μs
(1) 300-hour life test at 150°C demonstrated randomly distributed variation of approximately 1 μV.
(2) See the Typical Characteristics section.