JAJSIN9B
December 2008 – February 2020
OPA2333-Q1
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
0.1Hz~10Hzのノイズ
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics: VS = 1.8 V to 5.5 V
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Rail-to-Rail Input Voltage
7.3.2
Internal Offset Correction
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.1.1
Achieving Output Swing to the Op Amp Negative Rail
8.2
Typical Application
8.2.1
High-Side Voltage-to-Current (V-I) Converter
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curve
8.2.1.4
Single Op Amp Bridge Amplifier
8.2.1.5
Low-Side Current Monitor
8.2.1.6
High-Side Current Monitor
8.2.1.7
Precision Instrumentation Amplifier
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
デバイスおよびドキュメントのサポート
11.1
ドキュメントのサポート
11.1.1
関連資料
11.2
ドキュメントの更新通知を受け取る方法
11.3
サポート・リソース
11.4
商標
11.5
静電気放電に関する注意事項
11.6
Glossary
12
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
D|8
MSOI002K
DGK|8
MPDS028E
サーマルパッド・メカニカル・データ
発注情報
jajsin9b_oa
jajsin9b_pm
6.6
Typical Characteristics
At T
A
= 25°C, V
S
= 5 V, and C
L
= 0 pF (unless otherwise noted)
Figure 1.
Offset Voltage Production Distribution
Figure 3.
Open-Loop Gain vs Frequency
Figure 5.
Power-Supply Rejection Range vs Frequency
Figure 7.
Input Bias Current vs Common-Mode Voltage
Figure 9.
Quiescent Current vs Temperature
Figure 11.
Small-Signal Step Response
Figure 13.
Negative Over-Voltage Recovery
Figure 15.
Small-Signal Overshoot vs Load Capacitance
Figure 17.
Current and Voltage Spectral Density vs Frequency
Figure 2.
Offset Voltage Drift Production Distribution
Figure 4.
Common-Mode Rejection Ratio vs Frequency
Figure 6.
Output Voltage Swing vs Output Current
Figure 8.
Input Bias Current vs Temperature
Figure 10.
Large-Signal Step Response
Figure 12.
Positive Over-Voltage Recovery
Figure 14.
Settling Time vs Closed-Loop Gain
Figure 16.
0.1-Hz to 10-Hz Noise