JAJS010E March   2006  – December 2015 OPA2333 , OPA333

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA333
    5. 6.5 Thermal Information: OPA2333
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Input Voltage
      3. 7.3.3 Internal Offset Correction
      4. 7.3.4 Achieving Output Swing to the Op Amp Negative Rail
      5. 7.3.5 DFN Package
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 High-Side Voltage-to-Current (V-I) Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Precision, Low-Level Voltage-to-Current (V-I) Converter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 Composite Amplifier
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curve
    3. 8.3 System Examples
      1. 8.3.1 Temperature Measurement Application
      2. 8.3.2 Single Operational Amplifier Bridge Amplifier Application
      3. 8.3.3 Low-Side Current Monitor Application
      4. 8.3.4 Other Applications
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 General Layout Guidelines
      2. 10.1.2 DFN Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 関連リンク
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

OPA333 DBV Package
5-Pin SOT
Top View
OPA333 OPA2333 po_333_sot23_bos351.gif
OPA333 DCK Package
5-Pin SC70
Top View
OPA333 OPA2333 po_333_sc70_bos351.gif
OPA333 D Package
8-Pin SOIC
Top View
OPA333 OPA2333 po_333_so8_bos351.gif

Pin Functions: OPA333

PIN I/O DESCRIPTION
NAME SOIC SOT SC70
+IN 3 3 1 I Noninverting input
–IN 2 4 3 I Inverting input
NC 1, 5, 8 — — — No internal connection (can be left floating)
OUT 6 1 4 O Output
V+ 7 5 5 — Positive (highest) power supply
V– 4 2 2 — Negative (lowest) power supply
OPA2333 DRB Package
8-Pin VSON With Exposed Thermal Pad
Top View
OPA333 OPA2333 po_2333_dfn8_bos351.gif
OPA2333 D or DGK Package
8-Pin SOIC or VSSOP
Top View
OPA333 OPA2333 po_2333_so_msop_bos351.gif

Pin Functions: OPA2333

PIN I/O DESCRIPTION
NAME VSON SOIC, VSSOP
+IN — — I Noninverting input
+IN A 3 3 I Noninverting input, channel A
+IN B 5 5 I Noninverting input, channel B
–IN — — I Inverting input
–IN A 2 2 I Inverting input, channel A
–IN B 6 6 I Inverting input, channel B
OUT — — O Output
OUT A 1 1 O Output, channel A
OUT B 7 7 O Output, channel B
V+ 8 8 — Positive (highest) power supply
V– 4 4 — Negative (lowest) power supply