The OPAx991 ファミリ (OPA991、OPA2991、OPA4991) は、高電圧 (40V) 汎用オペアンプ・ファミリです。これらのデバイスは、レール・ツー・レール入出力、低いオフセット (±125µV、標準値)、低いオフセット・ドリフト (±0.3µV/℃、標準値)、低ノイズ (10.5nV/√Hz、1.8µVPP)、4.5MHz の帯域幅など、非常に優れた DC 精度と AC 性能を備えています。
電源レールまでの差動および同相入力電圧範囲、大きい出力電流 (±75mA)、高いスルーレート (21V/µs)、高い容量性負荷駆動能力 (1nF)、シャットダウン機能など、独自の特長を備えた OPAx991 は、高電圧産業用アプリケーション向けの堅牢な高性能オペアンプです。
OPAx991 ファミリのオペアンプは、標準パッケージ (SOT-23、SOIC、TSSOP など) だけでなくマイクロサイズ・パッケージ (X2QFN、WSON など) でも供給され、
-40℃~125℃で仕様が規定されています。
部品番号(1) | パッケージ | 本体サイズ (公称) |
---|---|---|
OPA991 | SOT-23 (5) | 2.90mm × 1.60mm |
SOT-23 (6) | 2.90mm × 1.60mm | |
SC70 (5) | 2.00mm × 1.25mm | |
OPA2991 | SOIC (8) | 4.90mm × 3.90mm |
SOT-23 (8) | 2.90mm × 1.60mm | |
TSSOP (8) | 3.00mm × 4.40mm | |
VSSOP (8) | 3.00mm × 3.00mm | |
WSON (8) | 2.00mm × 2.00mm | |
X2QFN (10) | 2.00mm × 1.50mm | |
OPA4991 | SOIC (14) | 8.65mm × 3.90mm |
SOT-23 (14) | 4.20mm × 1.90mm | |
TSSOP (14) | 5.00mm × 4.40mm | |
X2QFN (14) | 2.00mm × 2.00mm |
Changes from Revision E (May 2021) to Revision F (January 2022)
Changes from Revision D (July 2020) to Revision E (May 2021)
Changes from Revision C (May 2020) to Revision D (July 2020)
Changes from Revision B (May 2020) to Revision C (May 2020)
Changes from Revision A (December 2019) to Revision B (May 2020)
Changes from Revision * (October 2019) to Revision A (December 2019)
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | DBV, DRL | DCK | ||
IN+ | 3 | 1 | I | Noninverting input |
IN– | 4 | 3 | I | Inverting input |
OUT | 1 | 4 | O | Output |
V+ | 5 | 5 | — | Positive (highest) power supply |
V– | 2 | 2 | — | Negative (lowest) power supply |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
+IN | 3 | I | Noninverting input |
–IN | 4 | I | Inverting input |
OUT | 1 | O | Output |
SHDN | 5 | I | Shutdown: low = amplifier enabled, high = amplifier disabled. See Section 7.3.11 for more information. |
V+ | 6 | — | Positive (highest) power supply |
V– | 2 | — | Negative (lowest) power supply |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
+IN A | 3 | I | Noninverting input, channel A |
+IN B | 5 | I | Noninverting input, channel B |
–IN A | 2 | I | Inverting input, channel A |
–IN B | 6 | I | Inverting input, channel B |
OUT A | 1 | O | Output, channel A |
OUT B | 7 | O | Output, channel B |
V+ | 8 | — | Positive (highest) power supply |
V– | 4 | — | Negative (lowest) power supply |
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | VSSOP | X2QFN | ||
+IN A | 3 | 10 | I | Noninverting input, channel A |
+IN B | 7 | 4 | I | Noninverting input, channel B |
–IN A | 2 | 9 | I | Inverting input, channel A |
–IN B | 8 | 5 | I | Inverting input, channel B |
OUT A | 1 | 8 | O | Output, channel A |
OUT B | 9 | 6 | O | Output, channel B |
SHDN1 | 5 | 2 | I | Shutdown, channel 1: low = amplifier enabled, high = amplifier disabled. See Section 7.3.11 for more information. |
SHDN2 | 6 | 3 | I | Shutdown, channel 2: low = amplifier enabled, high = amplifier disabled. See Section 7.3.11 for more information. |
V+ | 10 | 7 | — | Positive (highest) power supply |
V– | 4 | 1 | — | Negative (lowest) power supply |
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | SOIC, TSSOP, SOT-23 | X2QFN | ||
IN1+ | 3 | 2 | I | Noninverting input, channel 1 |
IN1– | 2 | 1 | I | Inverting input, channel 1 |
IN2+ | 5 | 4 | I | Noninverting input, channel 2 |
IN2– | 6 | 5 | I | Inverting input, channel 2 |
IN3+ | 10 | 9 | I | Noninverting input, channel 3 |
IN3– | 9 | 8 | I | Inverting input, channel 3 |
IN4+ | 12 | 11 | I | Noninverting input, channel 4 |
IN4– | 13 | 12 | I | Inverting input, channel 4 |
NC | — | — | — | Do not connect |
OUT1 | 1 | 14 | O | Output, channel 1 |
OUT2 | 7 | 6 | O | Output, channel 2 |
OUT3 | 8 | 7 | O | Output, channel 3 |
OUT4 | 14 | 13 | O | Output, channel 4 |
V+ | 4 | 3 | — | Positive (highest) power supply |
V– | 11 | 10 | — | Negative (lowest) power supply |