SBOS538F January   2011  – December 2016 OPA2322 , OPA322 , OPA4322

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA322, OPA322S
    5. 6.5 Thermal Information: OPA2322, OPA2322S
    6. 6.6 Thermal Information: OPA4322, OPA4322S
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Input and ESD Protection
      3. 7.3.3 Phase Reversal
      4. 7.3.4 Feedback Capacitor Improves Response
      5. 7.3.5 EMI Susceptibility and Input Filtering
      6. 7.3.6 Output Impedance
      7. 7.3.7 Capacitive Load and Stability
      8. 7.3.8 Overload Recovery Time
      9. 7.3.9 Shutdown Function
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Active Filter
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Leadless DFN Package
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 TINA-TI™ (Free Software Download)
        2. 11.1.2.2 DIP Adapter EVM
        3. 11.1.2.3 Universal Operational Amplifier EVM
        4. 11.1.2.4 TI Precision Designs
        5. 11.1.2.5 WEBENCH Filter Designer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Community Resources
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10 Layout

10.1 Layout Guidelines

The OPA322 is a wideband amplifier. To realize the full operational performance of the device, follow good high-frequency printed-circuit board (PCB) layout practices. The bypass capacitors must be connected between each supply pin and ground as close to the device as possible. The bypass capacitor traces must be designed for minimum inductance.

10.1.1 Leadless DFN Package

The OPA2322 uses the DFN style package (also known as SON), which is a QFN with contacts on only two sides of the package bottom. This leadless package maximizes PCB space and offers enhanced thermal and electrical characteristics through an exposed pad. One of the primary advantages of the DFN package is its low height (0.8 mm).

DFN packages are physically small, and have a smaller routing area. Additionally, they offer improved thermal performance, reduced electrical parasitics, and a pinout scheme that is consistent with other commonly-used packages (such as SOIC and VSSOP). The absence of external leads also eliminates bent-lead issues.

The DFN package can easily be mounted using standard PCB assembly techniques. See the application reports, QFN/SON PCB Attachment and Quad Flatpack No-Lead Logic Packages. The dimension of the exposed thermal die pad is 2 mm × 1.2 mm and is centered.

NOTE

The exposed leadframe die pad on the bottom of the DFN package must be connected to the most negative potential (V–).

10.2 Layout Example

OPA322 OPA322S OPA2322 OPA2322S OPA4322 OPA4322S SOT_layout_example_SBOS538.gif Figure 41. Layout Example