SBOS522A June   2010  – November 2019 OPA333-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      0.1-Hz to 10-Hz Noise
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Rail-to-Rail Input Voltage
      2. 7.3.2 Internal Offset Correction
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Achieving Output Swing to the Op Amp Negative Rail
    2. 8.2 Typical Applications
      1. 8.2.1 High-Side Voltage-to-Current (V-I) Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Precision, Low-Level Voltage-to-Current (V-I) Converter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 Composite Amplifier
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curve
      4. 8.2.4 Temperature Measurement
      5. 8.2.5 Single Op-Amp Bridge-Amplifier
      6. 8.2.6 Low-Side Current-Monitor
      7. 8.2.7 High-Side Current Monitor
      8. 8.2.8 Thermistor Measurement
      9. 8.2.9 Precision Instrumentation Amplifier
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.3.2 Detailed Design Procedure

The two primary design considerations to maximize the performance of a high-resolution SAR ADC are the input driver and the reference driver design. The circuit comprises the critical analog circuit blocks, the input driver, antialiasing filter, and the reference driver. Each analog circuit block should be carefully designed based on the ADC performance specifications to maximize the distortion and noise performance of the data acquisition system while consuming low power. The diagram includes the most important specifications for each individual analog block. This design systematically approaches the design of each analog circuit block to achieve a 16-bit, low-noise and low-distortion data acquisition system for a 10-kHz sinusoidal input signal. The first step in the design requires an understanding of the requirements for an extremely low-distortion input-driver amplifier. This understanding helps in the decision of an appropriate input driver configuration and selection of an input amplifier to meet the system requirements. The next important step is the design of the antialiasing RC filter to attenuate ADC kickback noise while maintaining amplifier stability. The final design challenge is to design a high-precision reference driver circuit that provides the required-value VREF with low offset, drift, and noise contributions.

When designing a very low-distortion data-acquisition block, make sure to understand the sources of nonlinearity. Both the ADC and the input driver introduce nonlinearity in a data-acquisition block. To achieve the lowest distortion, the input driver for a high-performance SAR ADC must have a distortion that is negligible against the ADC distortion. This parameter requires the input driver distortion to be 10 dB less than the ADC THD. This stringent requirement makes sure that the overall THD of the system is not degraded by more than –0.5 dB.

Equation 3. THDAMP < THDADC – 10 dB

Therefore, make sure to choose an amplifier that meets the previous criteria to avoid the system THD from being limited by the input driver. The amplifier nonlinearity in a feedback system depends on the available loop gain. A detailed error analysis, design procedure, and additional measured results are given in the Data Acquisition Optimized for Lowest Distortion, Lowest Noise reference design.