JAJSFG4C December   2013  – May 2018 OPA355-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Device Comparison Table
    1. 5.1 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Enable Function
      3. 8.3.3 Output Drive
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Transimpedance Amplifier
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Optimizing The Transimpedance Circuit
        3. 9.2.1.3 Application Curve
      2. 9.2.2 High-Impedance Sensor Interface
      3. 9.2.3 Driving ADCs
      4. 9.2.4 Active Filter
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 商標
    2. 12.2 静電気放電に関する注意事項
    3. 12.3 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DBV|6
サーマルパッド・メカニカル・データ
発注情報

8.3.2 Enable Function

The OPA355-Q1 device is enabled by applying a TTL high-voltage level to the enable pin. Conversely, a TTL low -voltage level disables the amplifier, which reduces the supply current from 8.3 mA to 3.4 μA per amplifier. This pin voltage is referenced to a single-supply ground. When using a split-supply, such as ±2.5 V, the enable and disable voltage levels are referenced to V–. For portable battery-operated applications, this feature is used to greatly reduce the average current and as a result, extend battery life.

The enable input is modeled as a CMOS input gate with a 100-kΩ pullup resistor to V+. The enable pin assumes a logic high and the amplifier turns on if the enable pin is left open.

The enable time is 100 ns and the disable time is 30 ns, which allows the OPA355-Q1 device to operate as a gated amplifier, or to have the output multiplexed onto a common output bus. When disabled, the output assumes a high-impedance state.