JAJSFA0A
March 2009 – April 2018
OPA356-Q1
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
概略回路図
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Operating Voltage
7.3.2
Output Drive
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
Transimpedance Amplifier
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Optimizing The Transimpedance Circuit
8.2.1.3
Application Curve
8.2.2
High-Impedance Sensor Interface
8.2.3
Driving ADCs
8.2.4
Active Filter
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
デバイスおよびドキュメントのサポート
11.1
ドキュメントのサポート
11.1.1
関連資料
11.2
ドキュメントの更新通知を受け取る方法
11.3
コミュニティ・リソース
11.4
商標
11.5
静電気放電に関する注意事項
11.6
Glossary
12
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DBV|5
MPDS018S
サーマルパッド・メカニカル・データ
発注情報
jajsfa0a_oa
jajsfa0a_pm
6.6
Typical Characteristics
T
A
= 25°C, V
S
= 5 V, G = 2, R
F
= 604 Ω, R
L
= 150 Ω connected to V
S
/ 2 (unless otherwise noted)
Figure 1.
Noninverting Small-Signal Frequency Response
Figure 3.
Noninverting Small-Signal Step Response
Figure 5.
0.1-dB Gain Flatness for Various R
F
Figure 7.
Harmonic Distortion vs Non-Inverting Gain
Figure 9.
Harmonic Distortion vs Frequency
Figure 11.
Input Voltage and Current Noise
Spectral Density vs Frequency
Figure 13.
Frequency Response for Various C
L
Figure 15.
Frequency Response vs Capacitive Load
Figure 17.
Open-Loop Gain and Phase
Figure 19.
Input Bias Current vs Temperature
Figure 21.
Supply Current vs Temperature
Figure 23.
Closed-Loop Output Impedance vs Frequency
Figure 25.
Output Settling Time to 0.1%
Figure 27.
Offset Voltage Production Distribution
Figure 2.
Inverting Small-Signal Frequency Response
Figure 4.
Noninverting Large-Signal Step Response
Figure 6.
Harmonic Distortion vs Output Voltage
Figure 8.
Harmonic Distortion vs Inverting Gain
Figure 10.
Harmonic Distortion vs Load Resistance
Figure 12.
Frequency Response for Various R
L
Figure 14.
Recommended R
S
vs Capacitive Load
Figure 16.
Common-Mode Rejection Ratio and
Power-Supply Rejection Ratio vs Frequency
Figure 18.
Composite Video Differential Gain and Phase
V
S
= 3 V
Figure 20.
Output Voltage Swing vs Output Current
V
S
= 5 V
Figure 22.
Output Voltage Swing vs Output Current
Figure 24.
Maximum Output Voltage vs Frequency
Figure 26.
Open-Loop Gain vs Temperature
Figure 28.
Common-Mode Rejection Ratio and
Power-Supply Rejection Ratio vs Temperature