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OPAx365-Q1 50MHz、低歪み、高 CMRR、レール・ツー・レール I/O、単一電源オペアンプ (Rev. E 翻訳版)
JAJSK65E
March 2010 – November 2020
OPA2365-Q1
,
OPA365-Q1
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OPAx365-Q1 50MHz、低歪み、高 CMRR、レール・ツー・レール I/O、単一電源オペアンプ (Rev. E 翻訳版)
1
特長
2
アプリケーション
3
説明
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Operating Characteristics
7.3.2
Basic Amplifier Configurations
7.3.3
Input and ESD Protection
7.3.4
Rail-to-Rail Input
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.1.1
Capacitive Loads
8.1.2
Achieving an Output Level of Zero Volts (0 V)
8.1.3
Active Filtering
8.1.4
Driving an ADS7822-Q1 Analog-to-Digital Converter
8.1.5
Driving ADS1115-Q1 Analog-to-Digital Converter
8.2
Typical Application
8.2.1
Fast Settling Peak Detector
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curves
8.2.2
Bandpass Filter 1.5 kHz to 160 kHz and 40-db Flat Gain
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Support Resources
11.3
Trademarks
11.4
Electrostatic Discharge Caution
11.5
Glossary
12
Mechanical, Packaging, and Orderable Information
重要なお知らせ
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DBV|5
MPDS018T
サーマルパッド・メカニカル・データ
発注情報
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