JAJS180G may   2006  – may 2023 OPA2365 , OPA365

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: OPA365
    5. 7.5 Thermal Information: OPA2365
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Rail-to-Rail Input
      2. 8.3.2 Input and ESD Protection
      3. 8.3.3 Capacitive Loads
      4. 8.3.4 Achieving an Output Level of Zero Volts (0 V)
      5. 8.3.5 Active Filtering
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Basic Amplifier Configurations
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 System Examples
      1. 9.3.1 Driving an Analog-to-Digital Converter
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 PSpice® for TI
        2. 10.1.1.2 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        3. 10.1.1.3 DIP アダプタ評価基板
        4. 10.1.1.4 DIYAMP-EVM
        5. 10.1.1.5 TI のリファレンス・デザイン
        6. 10.1.1.6 フィルタ設計ツール
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

at TA = 25°C, VS = 5 V, and CL = 0 pF (unless otherwise noted)

GUID-0BE7E784-5224-4CC3-9D50-D4AEDF65C882-low.gif
 
Figure 7-1 Open-Loop Gain and Phase vs Frequency
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Figure 7-3 Offset Voltage Production Distribution
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Figure 7-5 Input Bias Current vs Temperature
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Figure 7-7 OPA365 Output Voltage vs Output Current
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Figure 7-9 Short-Circuit Current vs Temperature
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Figure 7-11 Quiescent Current vs Temperature
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Figure 7-13 Total Harmonic Distortion + Noise vs Frequency
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Figure 7-15 Overshoot vs Capacitive Load
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Figure 7-17 Large-Signal Step Response
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Figure 7-19 Large-Signal Step Response
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Figure 7-2 Power-Supply and Common-Mode Rejection Ratio vs Frequency
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Figure 7-4 Offset Voltage Drift Production Distribution
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Figure 7-6 Input Bias Current vs Common-Mode Voltage
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Figure 7-8 OPA2365 Output Voltage vs Output Current
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Figure 7-10 Quiescent Current vs Supply Voltage
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Figure 7-12 0.1-Hz to 10-Hz Input Voltage Noise
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Figure 7-14 Input Voltage Noise Spectral Density
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Figure 7-16 Small-Signal Step Response
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Figure 7-18 Small-Signal Step Response