JAJSKN5B April   2021  – December 2021 OPA3S2859-EP

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revison History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Programmable Gain
      2. 8.3.2 Slew Rate
      3. 8.3.3 Input and ESD Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Split-Supply and Single-Supply Operation
      2. 8.4.2 Power-Down Mode
      3. 8.4.3 Gain Select Mode (SEL)
      4. 8.4.4 Latch Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • RTW|24
サーマルパッド・メカニカル・データ
発注情報

Programmable Gain

The OPA3S2859-EP features integrated switches that can be used for implementing different gain configurations. The closed-loop bandwidth and noise of a TIA are affected by the transimpedance gain and photodiode capacitance. The OPA3S2859-EP has a higher bandwidth in its low-gain configuration for a given value of photodiode capacitance compared to the high-gain configuration. Increasing the gain of the TIA stage by a factor of X increases the output signal by a factor X, but the noise contribution from the resistor only increases by √X. The input-referred noise density of the low-gain configuration is therefore higher than the input-referred noise density of the high-gain configuration.

OPA3S2859-EP provides control for switching among three independently-configured external feedback networks using FB_x0, FB_x1, FB_x2 pins, and allows for up to four selectable gain configurations with an additional parallel non-switched feedback path. The internal switches minimize parasitic contributions to increase performance compared to external methods. Each switch is optimized for increasing feedback resistor values ranging from < 1 kΩ to > 100 kΩ for wide dynamic range applications. The selected switch path is controlled for both channels using a 2-wire parallel interface (SEL0 and SEL1).

In many systems it is typical that gain will switch sequentially (also known as adjacent gain switching). For example, the gain will switch low to medium to high or high to medium to low. When switching between adjacent gains, the switches feature make-before-break switching, when programmed to a different switch connection, the previous switch does not change to high impedance state until the new switch is closed, with a typical 80 ns to 230 ns delay when both switches are closed. This feature helps the amplifier from not operating in an open-loop state when the switches are used in a switched-gain transimpedance configuration.