JAJSV75C January   1995  – August 2024 OPA132 , OPA2132 , OPA4132

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information - OPA132
    5. 5.5 Thermal Information - OPA2132
    6. 5.6 Thermal Information - OPA4132
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Operating Voltage
      2. 7.1.2 Offset Voltage Trim
      3. 7.1.3 Input Bias Current
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Analog Filter Designer
        2. 8.1.1.2 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        3. 8.1.1.3 TI のリファレンス・デザイン
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Input Bias Current

The FET-inputs of the OPAx132 series provide very low input bias current and cause negligible errors in most applications. For applications where low input bias current is crucial, minimize junction temperature rise. The input bias current of FET-input operational amplifiers increases with temperature; see also Figure 5-5.

The OPAx132 series can be operated at reduced power supply voltage to minimize power dissipation and temperature rise. Using ±3V supplies reduces power dissipation to one-fifth used at ±15V.

The dual and quad versions have higher total power dissipation than the single version, leading to higher junction temperature. Thus, a warmed-up quad has higher input bias current than a warmed-up single. Furthermore, an SOIC generally has higher junction temperature than a DIP at the same ambient temperature because of a larger θJA.

Printed-circuit-board (PCB) layout also helps minimize junction temperature rise. Minimize temperature rise by soldering the devices to the PCB rather than using a socket. Wide copper traces also help dissipate the heat by acting as an additional heat sink.

Input stage cascode circuitry keeps the input bias current virtually unchanged throughout the full input common-mode range of the OPAx132 series. See also Figure 5-6.