JAJSF99G
March 2002 – April 2018
OPA2354
,
OPA354
,
OPA4354
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
概略回路図
4
改訂履歴
5
Device Comparison Table
6
Pin Configuration and Functions
Pin Functions: OPA354
Pin Functions: OPA2354
Pin Functions: OPA4354
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information: OPA354
7.5
Thermal Information: OPA2354
7.6
Thermal Information: OPA4354
7.7
Electrical Characteristics: VS = 2.7 V to 5.5 V (Single-Supply)
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Operating Voltage
8.3.2
Rail-to-Rail Input
8.3.3
Rail-to-Rail Output
8.3.4
Output Drive
8.3.5
Video
8.3.6
Driving Analog-to-Digital converters
8.3.7
Capacitive Load and Stability
8.3.8
Wideband Transimpedance Amplifier
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Optimizing the Transimpedance Circuit
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
11.3
Power Dissipation
11.4
PowerPAD Thermally-Enhanced Package
11.5
PowerPAD Assembly Process
12
デバイスおよびドキュメントのサポート
12.1
ドキュメントのサポート
12.2
関連リンク
12.3
ドキュメントの更新通知を受け取る方法
12.4
コミュニティ・リソース
12.5
商標
12.6
静電気放電に関する注意事項
12.7
Glossary
13
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PW|14
MPDS360A
D|14
MPDS177H
サーマルパッド・メカニカル・データ
発注情報
jajsf99g_oa
jajsf99g_pm
7.8
Typical Characteristics
at T
A
= 25°C, V
S
= 5 V, G = +1, R
F
= 0 Ω, R
L
= 1 kΩ, and connected to V
S
/ 2, (unless otherwise noted)
Figure 1.
Noninverting Small-Signal Frequency Response
Figure 3.
Noninverting Small-Signal Step Response
Figure 5.
0.1-dB Gain Flatness
Figure 7.
Harmonic Distortion vs Noninverting Gain
Figure 9.
Harmonic Distortion vs Frequency
Figure 11.
Input Voltage and Current Noise Spectral Density vs Frequency
Figure 13.
Frequency Response for Various C
L
Values
Figure 15.
Frequency Response vs Capacitive Load
Figure 17.
Open-Loop Gain and Phase
Figure 19.
Input Bias Current vs Temperature
Figure 21.
Supply Current vs Temperature
Figure 23.
Closed-Loop Output Impedance vs Frequency
Figure 25.
Output Settling Time to 0.1%
Figure 27.
Offset Voltage Production Distribution
Figure 29.
Channel-to-Channel Crosstalk
Figure 2.
Inverting Small-Signal Frequency Response
Figure 4.
Noninverting Large-Signal Step Response
Figure 6.
Harmonic Distortion vs Output Voltage
Figure 8.
Harmonic Distortion vs Inverting Gain
Figure 10.
Harmonic Distortion vs Load Resistance
Figure 12.
Frequency Response for Various R
L
Values
Figure 14.
Recommended R
S
vs Capacitive Load
Figure 16.
Common-Mode Rejection Ratio and Power-Supply Rejection Ratio vs Frequency
Figure 18.
Composite Video Differential Gain and Phase
V
S
= 3 V
Figure 20.
Output Voltage Swing vs Output Current
V
S
= 5 V
Figure 22.
Output Voltage Swing vs Output Current
Figure 24.
Maximum Output Voltage vs Frequency
Figure 26.
Open-Loop Gain vs Temperature
Figure 28.
Common-Mode Rejection Ratio and Power-Supply Rejection Ratio vs Temperature