JAJSMX8 October   2020 OPA455

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Status Flag Pin
      2. 7.3.2 Thermal Protection
      3. 7.3.3 Current Limit
      4. 7.3.4 Enable and Disable
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 High DAC Gain Stage for Semiconductor Test Equipment
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Improved Howland Current Pump for Bioimpedance Measurements in Multiparameter Patient Monitors
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Thermally-Enhanced PowerPAD™ Package
      2. 10.1.2 PowerPAD™ Integrated Circuit Package Layout Guidelines
      3. 10.1.3 Pin Leakage
      4. 10.1.4 Thermal Protection
      5. 10.1.5 Power Dissipation
      6. 10.1.6 Heat Dissipation
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI™ Simulation Software (Free Download)
        2. 11.1.1.2 TI Precision Designs
        3. 11.1.1.3 WEBENCH® Filter Designer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

PowerPAD™ Integrated Circuit Package Layout Guidelines

The PowerPAD integrated circuit package allows for both assembly and thermal management in one manufacturing operation. During the surface-mount solder operation (when the leads are being soldered), the thermal pad must be soldered to a copper area underneath the package. Through the use of thermal paths within this copper area, heat is conducted away from the package into either a ground plane or other heat-dissipating device. Always solder the PowerPAD to the PCB, even with applications that have low power dissipation. Follow these steps to attach the device to the PCB:

  1. Connect the PowerPAD to the most negative supply voltage on the device, V–.
  2. Prepare the PCB with a top-side etch pattern. There must be etching for the leads, as well as etching for the thermal pad.
  3. Thermal vias improve heat dissipation, but are not required. The thermal pad can connect to the PCB using an area equal to the pad size with no vias, but externally connected to V–.
  4. Place recommended holes in the area of the thermal pad. Recommended thermal land size and thermal via patterns for the SO-8 DDA package are shown in the thermal land pattern mechanical drawing appended at the end of this document. These holes must be 13 mils (0.013 in, or 0.3302 mm) in diameter. Keep the holes small, so that solder wicking through the holes is not a problem during reflow. The minimum recommended number of holes for the SO-8 PowerPAD package is five.
  5. Additional vias can be placed anywhere along the thermal plane outside of the thermal pad area. These vias help dissipate the heat generated by the OPA455 device. These additional vias may be larger than the 13-mil diameter vias directly under the thermal pad because they are not in the thermal pad area to be soldered; thus, wicking is not a problem.
  6. Connect all holes to the internal power plane of the correct voltage potential, V–.
  7. When connecting these holes to the plane, do not use the typical web or spoke via connection methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations, making the soldering of vias that have plane connections easier. In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore, the holes under the OPA455 PowerPAD package must make the connections to the internal plane with a complete connection around the entire circumference of the plated-through hole.
  8. The top-side solder mask must leave the pins of the package and the thermal pad area exposed. The bottom-side solder mask must cover the holes of the thermal pad area. This masking prevents solder from being pulled away from the thermal pad area during the reflow process.
  9. Apply solder paste to the exposed thermal pad area and all of the device pins.
  10. With these preparatory steps in place, simply place the device in position, and run through the solder reflow operation as with any standard surface-mount component.

This preparation results in a properly installed device. For detailed information on the PowerPAD package, including thermal modeling considerations and repair procedures, see the PowerPAD™ Thermally Enhanced Package application report.