JAJSKJ3J june   2020  – june 2023 OPA2863 , OPA4863 , OPA863

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information: OPA863
    5. 7.5  Thermal Information: OPA2863
    6. 7.6  Thermal Information: OPA4863
    7. 7.7  Electrical Characteristics: VS = 10 V
    8. 7.8  Electrical Characteristics: VS = 3 V
    9. 7.9  Typical Characteristics: VS = 10 V
    10. 7.10 Typical Characteristics: VS = 3 V
    11. 7.11 Typical Characteristics: VS = 3 V to 10 V
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Stage
      2. 8.3.2 Output Stage
        1. 8.3.2.1 Overload Power Limit
      3. 8.3.3 ESD Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Mode
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Low-Side Current Sensing
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Front-End Gain and Filtering
      3. 9.2.3 Low-Power SAR ADC Driver and Reference Buffer
      4. 9.2.4 Variable Reference Generator Using MDAC
      5. 9.2.5 Clamp-On Ultrasonic Flow Meter
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Thermal Considerations
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.4.1 Power-Down Mode

The OPAx863 includes a power-down mode for low-power standby operation with a quiescent current of only 1.5 μA (maximum) with a 3-V supply and high output impedance. Many low-power systems are active for only a small time interval when the parameters of interest are measured and remain in low-power standby mode for a majority of the time and an overall small average power consumption. The OPAx863 enables such a low-power operation with quick turn-on within less than 6.5 μs. See the Electrical Characteristics tables for power-down pin control thresholds.

Always drive PD pin to avoid false triggering and oscillations. If power-down mode is not used, then connect the PD pin to VS+. For applications that need power-down mode, use an external pull-up resistor from the PD pin to VS+ (driven with an open-collector power-down control logic).


GUID-20210426-CA0I-XGKB-RMRC-DZCGVKDHXJKG-low.svg

Figure 8-2 Power Down Control

Figure 8-2 shows the choice of value of the pull-up resistor RPU, which impacts the current consumption in power-down mode. Using a large RPU reduces power consumption, but increases the noise at the PD pin, which can cause the amplifier to power down. A 1‑nF capacitor can be used in parallel with RPU to avoid coupling of external noise and false triggering. For the case of the PD pin driven to VS-, the IPU current through RPU is given as:

Equation 1. GUID-20210426-CA0I-81PD-8CZF-LWF1JHKM4M79-low.gif