JAJSIC3D
October 1997 – December 2019
OPA548
PRODUCTION DATA.
1
特長
2
アプリケーション
概略回路図
3
概要
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Adjustable Current Limit
7.3.2
Enable/Status (E/S) Pin
7.3.3
Thermal Shutdown Status
7.4
Device Functional Modes
7.4.1
Output Disable
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
Basic Circuit Connections
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Power Supply Requirements
8.2.1.2.2
Gain Setting and Input Configuration
8.2.1.2.3
Current Limit
8.2.1.2.4
Safe-Operating-Area
8.2.1.2.5
Heat Sinking
8.2.1.3
Application Curve
8.2.2
Monitoring Single- and Dual-Supplies
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.2.2.1
Output Disable and Thermal Shutdown Status
8.2.3
Programmable Power Supply
8.3
System Examples
9
Power Supply Recommendations
9.1
Output Stage Compensation
9.2
Output Protection
10
Layout
10.1
Layout Guidelines
10.1.1
Safe Operating Area
10.1.2
Amplifier Mounting
10.1.3
Power Dissipation
10.1.4
Thermal Considerations
10.1.5
Heat Sinking
10.1.5.1
Heat Sink Selection Example
10.2
Layout Example
11
デバイスおよびドキュメントのサポート
11.1
デバイス・サポート
11.1.1
デベロッパー・ネットワークの製品に関する免責事項
11.2
ドキュメントのサポート
11.2.1
関連資料
11.3
ドキュメントの更新通知を受け取る方法
11.4
サポート・リソース
11.5
商標
11.6
静電気放電に関する注意事項
11.7
Glossary
12
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
KC|7
MSOT010
KTW|7
MPSF015
KVT|7
MPZF004
サーマルパッド・メカニカル・データ
発注情報
jajsic3d_oa
jajsic3d_pm
6.6
Typical Characteristics
at T
CASE
= 25°C, V
S
= ±30V, and E/S pin open (unless otherwise noted)
Figure 1.
Open-Loop Gain and Phase vs Frequency
Figure 3.
Current Limit vs Temperature
Figure 5.
Input Bias Current vs Common-Mode Voltage
Figure 7.
Common-Mode Rejection vs Frequency
Figure 9.
Voltage Noise Density vs Frequency
Figure 11.
Gain-Bandwidth Product and Slew Rate vs Temperature
Figure 13.
Output Voltage Swing vs Output Current
Figure 15.
Maximum Output Voltage Swing vs Frequency
Figure 17.
Offset Voltage Production Distribution
Figure 19.
Small-Signal Overshoot vs Load Capacitance
G = 1
C
L
= 1000 pF
Figure 21.
Small-Signal Step Response
Figure 2.
Input Bias Current vs Temperature
Figure 4.
Current Limit vs Supply Voltage
Figure 6.
Quiescent Current vs Temperature
Figure 8.
Power-Supply Rejection vs Frequency
Figure 10.
Open-loop Gain, Common-Mode Rejection,
and Power-Supply Rejection vs Temperature
Figure 12.
Total Harmonic Distortion+Noise vs Frequency
Figure 14.
Output Voltage Swing vs Temperature
Figure 16.
Output Leakage Current vs Applied Output Voltage
Figure 18.
Offset Voltage Drift Production Distribution
G = 3
C
L
= 1000 pF,
R
L
= 8 Ω
Figure 20.
Large-Signal Step Response
G = 3
C
L
= 1000 pF
Figure 22.
Small-Signal Step Response