SBOS206F January   2001  – October 2023 OPA561

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Feature Description
      1. 6.2.1 Adjustable Current Limit
        1. 6.2.1.1 Current Limit Accuracy
        2. 6.2.1.2 Setting the Current Limit
      2. 6.2.2 Enable-Status (E/S) Pin
        1. 6.2.2.1 Output Disable
        2. 6.2.2.2 Maintaining Microcontroller Compatibility
      3. 6.2.3 Overcurrent Flag
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Output Stage Compensation
      2. 7.1.2 Output Protection
      3. 7.1.3 Thermal Protection
      4. 7.1.4 Power Dissipation
      5. 7.1.5 Heat-Sink Area
      6. 7.1.6 Amplifier Mounting
        1. 7.1.6.1 What is the PowerPAD™ Integrated Circuit Package?
        2. 7.1.6.2 PowerPAD™ Integrated Circuit Package Assembly Process
    2. 7.2 Typical Application
      1. 7.2.1 Laser Diode Driver
      2. 7.2.2 Programmable Power Supply
      3. 7.2.3 Power-Line Communication Modem
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

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メカニカル・データ（パッケージ｜ピン）
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サーマルパッド・メカニカル・データ
発注情報

6.2.3 Overcurrent Flag

The OPA561 features an overcurrent status flag (CLS, pin 9) that can be monitored to see if the load exceeds the current limit. The output signal of the overcurrent limit flag is compatible to standard logic. The CLS signal is referenced to V−. A voltage level less than (V−) + 0.8 V indicates normal operation, and a level greater than (V−) + 2 V indicates that the OPA561 is current limited. The flag remains high as long as the output of the OPA561 current limited. At very low signal frequencies (typically < 1 kHz), both the upper (sourcing current) and lower (sinking current) current limits are monitored. At frequencies > 1 kHz, as a result of internal circuit limitations, the flag output signal for the upper current limit becomes delayed and shortened. The flag signal for the lower current limit is unaffected by this behavior. As the signal frequency increases further, only the lower current limit (sinking current) is output on pin 9.