JAJSVI0H
December 2001 – October 2024
OPA690
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics OPA690IDBV, VS = ±5 V
6.6
Electrical Characteristics OPA690IDBV, VS = 5 V
6.7
Electrical Characteristics OPA690ID, VS = ±5 V
6.8
Electrical Characteristics OPA690ID, VS = 5 V
6.9
Typical Characteristics: OPA690IDBV, VS = ±5V
6.10
Typical Characteristics: OPA690IDBV, VS = 5V
6.11
Typical Characteristics: OPA690ID, VS = ±5V
6.12
Typical Characteristics: OPA690ID, VS = 5V
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Wideband Voltage-Feedback Operation
7.3.2
Input and ESD Protection
7.4
Device Functional Modes
7.4.1
Disable Operation
8
Application and Implementation
8.1
Application Information
8.1.1
Bandwidth Versus Gain: Noninverting Operation
8.1.2
Inverting Amplifier Operation
8.1.3
Optimizing Resistor Values
8.1.4
Output Current and Voltage
8.1.5
Driving Capacitive Loads
8.1.6
Distortion Performance
8.1.7
Noise Performance
8.1.8
DC Accuracy and Offset Control
8.1.9
Thermal Analysis
8.2
Typical Applications
8.2.1
High-Performance DAC Transimpedance Amplifier
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.2
Single-Supply Active Filters
8.2.2.1
Design Requirements
8.2.2.2
Application Curve
8.2.3
High-Power Line Driver
8.2.3.1
Design Requirements
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
Macromodels and Applications Support
9.1.2
Demonstration Fixtures
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
Trademarks
9.5
静電気放電に関する注意事項
9.6
用語集
10
Revision History
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
D|8
MSOI002K
DBV|6
MPDS026Q
サーマルパッド・メカニカル・データ
発注情報
jajsvi0h_oa
jajsvi0h_pm
8.1
Application Information