JAJSVI0H December   2001  – October 2024 OPA690

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics OPA690IDBV, VS = ±5 V
    6. 6.6  Electrical Characteristics OPA690IDBV, VS = 5 V
    7. 6.7  Electrical Characteristics OPA690ID, VS = ±5 V
    8. 6.8  Electrical Characteristics OPA690ID, VS = 5 V
    9. 6.9  Typical Characteristics: OPA690IDBV, VS = ±5V
    10. 6.10 Typical Characteristics: OPA690IDBV, VS = 5V
    11. 6.11 Typical Characteristics: OPA690ID, VS = ±5V
    12. 6.12 Typical Characteristics: OPA690ID, VS = 5V
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Wideband Voltage-Feedback Operation
      2. 7.3.2 Input and ESD Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Disable Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Bandwidth Versus Gain: Noninverting Operation
      2. 8.1.2 Inverting Amplifier Operation
      3. 8.1.3 Optimizing Resistor Values
      4. 8.1.4 Output Current and Voltage
      5. 8.1.5 Driving Capacitive Loads
      6. 8.1.6 Distortion Performance
      7. 8.1.7 Noise Performance
      8. 8.1.8 DC Accuracy and Offset Control
      9. 8.1.9 Thermal Analysis
    2. 8.2 Typical Applications
      1. 8.2.1 High-Performance DAC Transimpedance Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
      2. 8.2.2 Single-Supply Active Filters
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Application Curve
      3. 8.2.3 High-Power Line Driver
        1. 8.2.3.1 Design Requirements
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Macromodels and Applications Support
      2. 9.1.2 Demonstration Fixtures
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.7 Electrical Characteristics OPA690ID, VS = ±5 V

at TA ≅ 25°C, RF = 402 Ω, RL = 100 Ω, G = 2 V/V, and input and output referenced to midsupply (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE (SEE Figure 7-1)
SSBW Small-signal bandwidth G = 1 V/V, VO = 0.5 VPP, RF = 25 Ω 500 MHz
G = 2 V/V, VO = 0.5 VPP 220
G = 10 V/V, VO = 0.5 VPP 30
GBP Gain bandwidth product G ≥ 10 V/V 300 MHz
Bandwidth for 0.1-dB gain flatness VO < 0.5 VPP 30 MHz
Peaking at a gain of 1 V/V VO < 0.5 VPP 4 dB
Large-signal bandwidth VO = 5 VPP 200 MHz
Slew rate 4-V step 1800 V/µs
Rise-and-fall time VO = 0.5-V step 1.4 ns
VO = 5-V step 2.8
Settling time 0.02%, VO = 2-V step 12 ns
0.1%, VO = 2-V step 8
Harmonic distortion 2nd-harmonic,
f = 5 MHz		 VO = 2 VPP, RL = 100 Ω –68 dBc
VO = 2 VPP, RL = 500 Ω –77
3rd-harmonic,
f = 5 MHz		 VO = 2 VPP, RL = 100 Ω –70
VO = 2 VPP, RL = 500 Ω –81
Input voltage noise f > 1 MHz 5.5 nV/√Hz
Input current noise f > 1 MHz 3.1 pA/√Hz
DC PERFORMANCE
AOL Open-loop voltage gain VO = 0 V, RL = 100 Ω 58 69 dB
TA = –40°C to +85°C 54
VOS Input offset voltage VCM = 0 V ±1 ±4 mV
TA = –40°C to +85°C ±4.7
Average offset voltage drift VCM = 0 V, TA = –40°C to +85°C ±10 µV/°C
Input bias current VCM = 0 V ±3 ±10 µA
TA = –40°C to +85°C ±12
Average bias current drift VCM = 0 V, TA = –40°C to +85°C ±40 nA/°C
Input offset current VCM = 0 V ±0.1 ±1 µA
TA = –40°C to +85°C ±1.6
Average offset current drift VCM = 0 V, TA = –40°C to +85°C ±9 nA/°C
INPUT
CMIR Common-mode input voltage(1) ±3.4 ±3.5 V
TA = –40°C to +85°C ±3.2
CMRR Common-mode rejection ratio VCM = ±1 V 60 65 dB
TA = –40°C to +85°C 56
Input impedance Differential mode, VCM = 0 V 190 || 0.6 kΩ || pF
Common-mode, VCM = 0 V 3.2 || 0.9 MΩ || pF
OUTPUT
Voltage output swing No load ±3.8 ±4 V
TA = –40°C to +85°C ±3.6
RL = 100 Ω ±3.7 ±3.9
TA = –40°C to +85°C ±3.3
Current output Sourcing, VO = 0 V 160 190 mA
TA = –40°C to +85°C 100
Sinking, VO = 0 V  –160 –190
TA = –40°C to +85°C –100
Short-circuit current limit VO = 0 V ±250 mA
Closed-loop output impedance G = 2, f = 100 kHz 0.04 Ω
DISABLE (DISABLED LOW)
Power-down supply current VDIS = 0 V –100 –200 µA
TA = –40°C to +85°C –260
Disable time VIN = 1 VDC 200 ns
Enable time VIN = 1 VDC 25 ns
Off isolation RL = 150 Ω, VIN = 0 V 70 dB
Output capacitance in disable G = 2, RL = 150 Ω, VIN = 0 V 4 pF
Turn-on glitch ±50 mV
Turn-off glitch ±20 mV
Enable voltage 3.5 3.3 V
TA = –40°C to +85°C 3.7
Disable voltage 1.8 1.7 V
TA = –40°C to +85°C 1.5
Control-pin input bias current VDIS = 0 V 75 130 µA
TA = –40°C to +85°C 160
POWER SUPPLY
Quiescent current 5.3 5.5 5.8 mA
TA = –40°C to +85°C 4.3 6.6
PSRR Power-supply rejection ratio Input-referred 68 75 dB
TA = –40°C to +85°C 64
(1) Tested < 3 dB below minimum specified CMRR at ±CMIR limits.