JAJSP64I December   2003  – October 2024 OPA695

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics VS = ±5 V, OPA695ID, OPA695IDBV
    6. 5.6  Electrical Characteristics VS = 5 V, OPA695ID, OPA695IDBV
    7. 5.7  Electrical Characteristics VS = ±5 V, OPA695IDGK
    8. 5.8  Electrical Characteristics VS = 5 V, OPA695IDGK
    9. 5.9  Typical Characteristics: VS = ±5 V, OPA695IDBV, OPA695ID
    10. 5.10 Typical Characteristics: VS = 5 V, OPA695IDBV, OPA695ID
    11. 5.11 Typical Characteristics: VS = ±5 V, OPA695IDGK
    12. 5.12 Typical Characteristics: VS = 5 V, OPA695IDGK
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Wideband Current-Feedback Operation
      2. 6.3.2 Input and ESD Protection
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Operating Suggestions
        1. 7.1.1.1 Setting Resistor Values to Optimize Bandwidth
        2. 7.1.1.2 Output Current and Voltage
        3. 7.1.1.3 Driving Capacitive Loads
        4. 7.1.1.4 Distortion Performance
        5. 7.1.1.5 Noise Performance
        6. 7.1.1.6 Thermal Analysis
      2. 7.1.2 LO Buffer Amplifier
      3. 7.1.3 Wideband Cable Driving Applications
        1. 7.1.3.1 Cable Modem Return Path Driver
        2. 7.1.3.2 Arbitrary Waveform Driver
      4. 7.1.4 Differential I/O Applications
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Saw Filter Buffer
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Design-In Tools
        1. 8.1.1.1 Demonstration Fixtures
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Layout Guidelines

Achieving optimized performance with a high-frequency amplifier like the OPA695 requires careful attention to board layout parasitics and external component types. Recommendations to optimize performance include:

  • Minimize parasitic capacitance to any ac ground for all of the signal I/O pins. Parasitic capacitance on the output and inverting input pins can cause instability; on the noninverting input, parasitic capacitance can react with the source impedance to cause unintentional band-limiting. To reduce unwanted capacitance, a open a window around the signal I/O pins in all of the ground and power planes around those pins. Otherwise, ground and power planes must be unbroken elsewhere on the board.
  • Minimize the distance (< 0.25") from the power supply pins to high frequency 0.1-μF decoupling capacitors. At the device pins, the ground and power plane layout must not be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. Always decouple the power-supply connections with these capacitors. An optional supply-decoupling capacitor across the two power supplies (for bipolar operation) improves 2nd-harmonic distortion performance. Larger (2.2 μF to 6.8 μF) decoupling capacitors, effective at a lower frequency, must also be used on the main supply pins. These decoupling capacitors can be placed somewhat farther from the device, and can be shared among several devices in the same area of the PCB.
  • Careful selection and placement of external components preserves the high-frequency performance of the OPA695. Use low-reactance-type resistors. Surface-mount resistors work best and allow a tighter overall layout. Metal-film and carbon composition, axially-leaded resistors can also provide good high-frequency performance. Keep the leads and PCB trace length as short as possible. Never use wirewound-type resistors in a high frequency application. The output pin and inverting input pin are the most sensitive to parasitic capacitance; therefore, always position the feedback and series output resistor, if any, as close as possible to the output pin. Place other network components, such as noninverting input termination resistors, close to the package. Where double-side component mounting is allowed, place the feedback resistor directly under the package on the other side of the board between the output and inverting input pins. The frequency response is primarily determined by the feedback resistor value. Increasing the value reduces the bandwidth, while decreasing the value gives a more peaked frequency response. The 402-Ω feedback resistor (used in the typical performance specifications at a gain of +8 on ±5-V supplies) is a good starting point for design. Note that a 523-Ω feedback resistor, rather than a direct short, is required for the unity gain follower application. A current-feedback operational amplifier requires a feedback resistor, even in the unity gain follower configuration, to control stability.
  • Connections to other wideband devices on the board can be made with short direct traces or through onboard transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Relatively wide traces (50 mils to 100 mils) must be used, preferably with ground and power planes opened up around them. Estimate the total capacitive load and set the series isolation resistance from the isolation resistance versus capacitive load characteristics. If a long trace is required, and the 6-dB signal loss intrinsic to a doubly-terminated transmission line is acceptable, implement a matched impedance transmission line using microstrip or stripline techniques (consult an ECL design handbook for microstrip and stripline layout techniques). A 50-Ω environment is usually not necessary on board. In fact, a higher impedance environment improves distortion, as shown in the distortion versus load plots. With a characteristic board trace impedance defined (based on board material and trace dimensions), use a matching series resistor into the trace from the output of the OPA695. Also use terminating shunt resistor at the input of the destination device. Remember that the terminating impedance is the parallel combination of the shunt resistor and the input impedance of the destination device; set this total effective impedance to match the trace impedance. The high output voltage and current capability of the OPA695 allows multiple destination devices to be handled as separate transmission lines, each with series and shunt terminations. If the 6-dB attenuation of a doubly-terminated transmission line is unacceptable, a long trace can be series-terminated at the source end only. Treat the trace as a capacitive load in this case, and set the series isolation resistance from the isolation resistance versus capacitive load characteristics. This setting does not preserve signal integrity as well as a doubly-terminated line. If the input impedance of the destination device is low, some signal attenuation occurs due to the voltage divider formed by the series output into the terminating impedance.
  • Socketing a high-speed part like the OPA695 is not recommended. The additional lead length and pin-to-pin capacitance introduced by the socket can create a troublesome parasitic network, which makes achieving a smooth, stable frequency response almost impossible. Best results are obtained by soldering the OPA695 directly onto the board.