JAJSP64I December   2003  – October 2024 OPA695

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics VS = ±5 V, OPA695ID, OPA695IDBV
    6. 5.6  Electrical Characteristics VS = 5 V, OPA695ID, OPA695IDBV
    7. 5.7  Electrical Characteristics VS = ±5 V, OPA695IDGK
    8. 5.8  Electrical Characteristics VS = 5 V, OPA695IDGK
    9. 5.9  Typical Characteristics: VS = ±5 V, OPA695IDBV, OPA695ID
    10. 5.10 Typical Characteristics: VS = 5 V, OPA695IDBV, OPA695ID
    11. 5.11 Typical Characteristics: VS = ±5 V, OPA695IDGK
    12. 5.12 Typical Characteristics: VS = 5 V, OPA695IDGK
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Wideband Current-Feedback Operation
      2. 6.3.2 Input and ESD Protection
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Operating Suggestions
        1. 7.1.1.1 Setting Resistor Values to Optimize Bandwidth
        2. 7.1.1.2 Output Current and Voltage
        3. 7.1.1.3 Driving Capacitive Loads
        4. 7.1.1.4 Distortion Performance
        5. 7.1.1.5 Noise Performance
        6. 7.1.1.6 Thermal Analysis
      2. 7.1.2 LO Buffer Amplifier
      3. 7.1.3 Wideband Cable Driving Applications
        1. 7.1.3.1 Cable Modem Return Path Driver
        2. 7.1.3.2 Arbitrary Waveform Driver
      4. 7.1.4 Differential I/O Applications
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Saw Filter Buffer
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Design-In Tools
        1. 8.1.1.1 Demonstration Fixtures
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Arbitrary Waveform Driver

The OPA695 can be used as the output stage for moderate output power arbitrary waveform driver applications. Driving out through a series 50-Ω matching resistor into a 50-Ω matched load allows up to a 4.0-VPP swing at the matched load (15 dBm) when operating the OPA695 on a ±5-V power supply. This level of power is available for gains of either ±8 V/V with a flat response through 100 MHz. When interfacing directly from a complementary current output DAC, consider the circuit of Figure 7-7, modified for the peak output currents of the particular DAC being considered. Where purely ac-coupled output signals are required from a complementary current output DAC, consider a push-pull output stage using the circuit of Figure 7-7. The resistor values here have been calculated for a 20-mA peak output current DAC, which produces up to a 5-VPP swing at the matched load (18 dBm). This approach gives higher power at the load, with lower 2nd-harmonic distortion.

For a 20-mA peak output current DAC, the midscale current of 10 mA gives a 2-V dc output common-mode operating voltage, due to the 200-Ω resistor to ground at the outputs. The total ac impedance at each output is 50 Ω, giving a ±0.5-V swing around this 2-V common-mode voltage for the DAC. These resistors also act as a current divider, sending 75% of the DAC output current through the feedback resistor (464 Ω). The blocking capacitor references the OPA695 output voltage to ground, and turns the unipolar DAC output current into a bipolar swing of 0.75 × 20 mA × 464 Ω = 7 VPP at each amplifier output. Each output is exactly 180° out-of-phase from the other, producing double 7 VPP into the matching resistors. To limit the peak output current and improve distortion, the circuit of Figure 7-7 is set up with a 1.4:1 step-down transformer. This reflects the 50-Ω load to be 100 Ω at the primary side of the transformer. For the maximum 14-VPP swing across the outputs of the two amplifiers, the matching resistors drop this to 7 VPP at the input of the transformer, then down to 5-VPP maximum at the 50-Ω load at the output of the transformer. This step-down approach reduces the peak output current to 14 VP/(200 Ω) = 70 mA.

OPA695 High Power, Wideband AC-Coupled Arbitrary Waveform DriverFigure 7-7 High Power, Wideband AC-Coupled Arbitrary Waveform Driver