JAJSHS6E August   2019  – August 2024 OPA810

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: 10 V
    6. 6.6  Electrical Characteristics: 24 V
    7. 6.7  Electrical Characteristics: 5 V
    8. 6.8  Typical Characteristics: VS = 10 V
    9. 6.9  Typical Characteristics: VS = 24 V
    10. 6.10 Typical Characteristics: VS = 5 V
    11. 6.11 Typical Characteristics: ±2.375-V to ±12-V Split Supply
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 OPA810 Architecture
      2. 7.3.2 ESD Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Split-Supply Operation (±2.375 V to ±13.5 V)
      2. 7.4.2 Single-Supply Operation (4.75 V to 27 V)
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Amplifier Gain Configurations
      2. 8.1.2 Selection of Feedback Resistors
      3. 8.1.3 Noise Analysis and the Effect of Resistor Elements on Total Noise
    2. 8.2 Typical Applications
      1. 8.2.1 Transimpedance Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 High-Z Input Data Acquisition Front-End
      3. 8.2.3 Multichannel Sensor Interface
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 サード・パーティ製品に関する免責事項
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • D|8
  • DBV|5
  • DCK|5
サーマルパッド・メカニカル・データ
発注情報

High-Z Input Data Acquisition Front-End

An ideal data acquisition system must measure a parameter without altering the measurand. When measuring a voltage or current from sensors with a large output impedance, an extremely high input impedance front-end with a pA range bias current is needed. Figure 8-15 shows an example circuit with the OPA810 used at the front-end. For systems with large input voltage attenuated with the MΩ range resistor divider, the OPA810 with pA range bias currents adds negligible offset voltage and distortion because of the bias current induced resistor voltage drops. This circuit shows a funneling architecture with the OPA810 FET-input amplifier used as a unity-gain buffer, followed by attenuation to the ADS9110 5-V, full-scale input range and the ADC input drive using the THS4561 fully-differential amplifier (FDA). The THS4561 helps achieve better SNR and ENOB than a similar 5-V FDA, with a higher 12.6-V supply voltage and signal swings up to the ADC full-scale input range.

As a result of the capacitive switching and current inrush on the ADC VREF input pin, a wide bandwidth amplifier such as the OPA837 is used with the OPA378 in a composite loop as a reference buffer. The OPA378, driven from the REF5050 5-V voltage reference, offers high precision and the OPA837 gives fast-settling performance for the ADC reference input drive. See the Reference Design Maximizing Signal Dynamic Range for True 10 Vpp Differential Input to 20 bit ADC design guide for more a detailed analysis of this high-Z front-end.

OPA810 High-Z Input Data Acquisition Front-EndFigure 8-15 High-Z Input Data Acquisition Front-End