JAJSHS6E August   2019  – August 2024 OPA810

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: 10 V
    6. 6.6  Electrical Characteristics: 24 V
    7. 6.7  Electrical Characteristics: 5 V
    8. 6.8  Typical Characteristics: VS = 10 V
    9. 6.9  Typical Characteristics: VS = 24 V
    10. 6.10 Typical Characteristics: VS = 5 V
    11. 6.11 Typical Characteristics: ±2.375-V to ±12-V Split Supply
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 OPA810 Architecture
      2. 7.3.2 ESD Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Split-Supply Operation (±2.375 V to ±13.5 V)
      2. 7.4.2 Single-Supply Operation (4.75 V to 27 V)
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Amplifier Gain Configurations
      2. 8.1.2 Selection of Feedback Resistors
      3. 8.1.3 Noise Analysis and the Effect of Resistor Elements on Total Noise
    2. 8.2 Typical Applications
      1. 8.2.1 Transimpedance Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 High-Z Input Data Acquisition Front-End
      3. 8.2.3 Multichannel Sensor Interface
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 サード・パーティ製品に関する免責事項
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • D|8
  • DBV|5
  • DCK|5
サーマルパッド・メカニカル・データ
発注情報

8.1.3 Noise Analysis and the Effect of Resistor Elements on Total Noise

The OPA810 provides a low input-referred broadband noise voltage density of 6.3 nV/√ Hz while requiring a low 3.7-mA quiescent supply current. To take full advantage of this low input noise, careful attention to the other possible noise contributors is required. Figure 8-10 shows the operational amplifier noise analysis model with all the noise terms included. In this model, all the noise terms are taken to be noise voltage or current density terms in nV/√ Hz or pA/√ Hz.

OPA810 Operational Amplifier Noise Analysis Model Figure 8-10 Operational Amplifier Noise Analysis Model

The total output spot noise voltage is computed as the square root of the squared contributing terms to the output noise voltage. This computation adds all the contributing noise powers at the output by superposition, then calculates the square root to get back to a spot noise voltage. Figure 8-10 shows the general form for this output noise voltage using the terms shown in Equation 7.

Equation 7. OPA810

Dividing this expression by the noise gain (NG = 1 + RF / RG) shows the equivalent input referred spot noise voltage at the noninverting input; see Equation 8.

Equation 8. OPA810

Substituting large resistor values into Equation 8 can quickly dominate the total equivalent input referred noise. A source impedance on the noninverting input of 2-kΩ adds a Johnson voltage noise term similar to that of the amplifier (6.3 nV/√ Hz).

Table 8-1 compares the noise contributions from the various terms when the OPA810 is configured in a noninverting gain of 5 V/V as Figure 8-11 shows. Two cases are considered where the resistor values in case 2 are 10x the resistor values in case 1. The total output noise in case 1 is 34 nV/√ Hz while the noise in case 2 is 51.5 nV/√ Hz. The large value resistors in case 2 dilute the benefits of selecting a low noise amplifier like the OPA810. To minimize total system noise, reduce the size of the resistor values. This increases the amplifiers output load and results in a degradation of distortion performance. The increased loading increases the dynamic power consumption of the amplifier. The circuit designer must make the appropriate tradeoffs to maximize the overall performance of the amplifier to match the system requirements.

OPA810 Comparing Noise Contributors for Two Cases with the Amplifier in a Noninverting Gain of 5 V/VFigure 8-11 Comparing Noise Contributors for Two Cases with the Amplifier in a Noninverting Gain of 5 V/V
Table 8-1 Comparing Noise Contributions for the Circuit in Figure 8-11
NOISE SOURCEOUTPUT NOISE EQUATIONCASE 1CASE 2
NOISE SOURCE VALUEVOLTAGE NOISE CONTRIBUTION (nV/√ Hz)NOISE POWER CONTRIBUTION (nV2/Hz)CONTRIBUTION (%)NOISE SOURCE VALUEVOLTAGE NOISE CONTRIBUTION (nV/√ Hz)NOISE POWER CONTRIBUTION (nV2/Hz)CONTRIBUTION (%)
Source resistor, RSERS (1 + RF /RG)1.82 nV/√ Hz9.182.817.155.76 nV/√ Hz28.8829.4431.29
Gain resistor, RGERG (RF / RG)2.04 nV/√ Hz8.1666.595.756.44 nV/√ Hz25.76663.5825.03
Feedback resistor, RFERF4.07 nV/√ Hz4.0716.571.4312.87 nV/√ Hz12.87165.646.25
Amplifier voltage noise, ENIENI (1 + RF / RG)6.3 nV/√ Hz31.5992.2585.676.3 nV/√ Hz31.5992.2537.43
Inverting current noise, IBIIBI (RF || RG)5 fA/√ Hz5.0E-3——5 fA/√ Hz50E-3——
Noninverting current noise, IBNIBNRS (1 + RF/ RG)5 fA/√ Hz1.0E-3——5 fA/√ Hz10E-3——