JAJSLI5J January   2011  – March 2021 OPA2835 , OPA835

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparision Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: OPA835
    5. 7.5 Thermal Information: OPA2835
    6. 7.6 Electrical Characteristics: VS = 2.7 V
    7. 7.7 Electrical Characteristics: VS = 5 V
    8. 7.8 Typical Characteristics: VS = 2.7 V
    9. 7.9 Typical Characteristics: VS = 5 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Common-Mode Voltage Range
      2. 8.3.2 Output Voltage Range
      3. 8.3.3 Power-Down Operation
      4. 8.3.4 Low-Power Applications and the Effects of Resistor Values on Bandwidth
      5. 8.3.5 Driving Capacitive Loads
    4. 8.4 Device Functional Modes
      1. 8.4.1 Split-Supply Operation (±1.25 V to ±2.75 V)
      2. 8.4.2 Single-Supply Operation (2.5 V to 5.5 V)
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1  Noninverting Amplifier
      2. 9.1.2  Inverting Amplifier
      3. 9.1.3  Instrumentation Amplifier
      4. 9.1.4  Attenuators
      5. 9.1.5  Single-Ended to Differential Amplifier
      6. 9.1.6  Differential to Single-Ended Amplifier
      7. 9.1.7  Differential-to-Differential Amplifier
      8. 9.1.8  Gain Setting With OPA835 RUN Integrated Resistors
      9. 9.1.9  Pulse Application With Single-Supply
      10. 9.1.10 ADC Driver Performance
    2. 9.2 Typical Application
      1. 9.2.1 Audio Frequency Performance
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Active Filters
        1. 9.2.2.1 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 サポート・リソース
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.2.1.3 Application Curves

A 10-Ω series resistor can be inserted between the capacitor and the noninverting pin to isolate the capacitance.

Figure 9-12 shows the THD+N performance with 100-kΩ and 300-Ω loads, and with no weighting and A-weighting. With no weighting, the THD+N performance is dominated by the noise for both loads. A-weighting provides filtering that improves the noise so a larger difference can be seen between the loads due to more distortion with RL = 300 Ω.

Figure 9-13 and Figure 9-14 show FFT output with a 1-kHz tone and 100-kΩ and 300-Ω loads. To show relative performance of the device versus the test set, one channel has the OPA835 device in-line between generator output and analyzer input, and the other channel is in “Gen Mon” loopback mode, which internally connects the signal generator to the analyzer input. With 100-kΩ load (see Figure 9-13), the curves are indistinguishable from each other except for noise, which means the OPA835 device cannot be directly measured. With a 300-Ω load as shown in Figure 9-14, the main difference between the curves is the OPA835 device due to the higher even-order harmonics. The test-set performance masks the odd-order harmonics.

GUID-A94F58A0-D389-44DC-97C5-7385AD1D7930-low.gifFigure 9-12 OPA835 1 VRMS 20 Hz to 80 kHz THD+N
GUID-29715DFA-771E-49AC-8FC0-52B83689355B-low.gifFigure 9-14 OPA835 and AP Gen Mon 1kHz FFT Plot; VOUT = 1 VRMS, RL = 300 Ω
GUID-368C77D7-E3B6-41F2-B9BD-16F3BF8A3D70-low.gifFigure 9-13 OPA835 and AP Gen Mon 1-kHz FFT Plot; VOUT = 1 VRMS, RL = 100 kΩ