JAJSQK2A November   2023  – July 2024 OPA2892 , OPA892

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Offset Nulling
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving a Capacitive Load
      2. 7.1.2 General Configuration
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 General PowerPAD™ Integrated Circuit Package Design Considerations
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • D|8
サーマルパッド・メカニカル・データ
発注情報

Pin Configuration and Functions

OPA892 OPA2892 OPA892: D Package,
                                                  8-Pin SOIC (Top View) Figure 4-1 OPA892: D Package, 8-Pin SOIC (Top View)
Table 4-1 Pin Functions: OPA892
PINTYPEDESCRIPTION
NAMENO.
IN–2InputInverting input
IN+3InputNoninverting input
NC5No connection
NULL1, 8InputVoltage offset adjust
OUT6OutputOutput of amplifier
VCC–4Negative power supply
VCC+7Positive power supply
OPA892 OPA2892 OPA2892: DGN Package,
                                                  8-pin HVSSOP (Top View) Figure 4-2 OPA2892: DGN Package, 8-pin HVSSOP (Top View)
Table 4-2 Pin Functions: OPA2892
PINTYPEDESCRIPTION
NAMENO.
1IN–2InputChannel 1 inverting input
1IN+3InputChannel 1 noninverting input
1OUT1OutputChannel 1 output
2IN–6InputChannel 2 inverting input
2IN+5InputChannel 2 noninverting input
2OUT7OutputChannel 2 output
VCC–4Negative power supply
VCC+8Positive power supply
Thermal pad Thermal pad. DGN (HVSSOP) package only. For best thermal performance, connect pad to large copper plane. Thermal pad can be connected to any pin on the device, or any other potential on the board if voltage on thermal pad remains between VCC+ and VCC–.