JAJSEU6A February 2018 – June 2018 OPT3101
PRODUCTION DATA.
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | UNMASK_ILLUMEN_INTXTALK | EN_ILLUM_CLK_GPIO | |||||
R/W - 0h | R/W - 0h | R/W - 0h | |||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ILLUM_CLK_GPIO_MODE | RESERVED | DIS_ILLUM_CLK_TX | INVERT_AFE_CLK | RESERVED | INVERT_TG_CLK | SHUT_CLOCKS | |
R/W - 0h | R/W - 0h | R/W - 0h | R/W - 0h | R/W - 0h | R/W - 0h | ||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | SHIFT_ILLUM_PHASE | DEALIAS_FREQ | DEALIAS_EN | RESERVED | |||
R/W - 0h | R/W - 0h | R/W - 0h | R/W - 0h | R/W - 0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
23:18 | RESERVED | R/W | 0h | Always read or write 0h. |
17 | UNMASK_ILLUMEN_INTXTALK | R/W | 0h | Mask or unmask ILLUM_EN_TX0 going to GPIO with internal crosstalk signal
0: ILLUM_EN_TX0 is masked with internal crosstalk correction signal 1: ILLUM_EN_TX0 is not masked with internal crosstalk correction signal |
16 | EN_ILLUM_CLK_GPIO | R/W | 0h | Enable ILLUM CLK going to GPIO
0: Illumination clock to GPIO is disabled. | 1: Illumination clock to GPIO is enabled. |
15 | ILLUM_CLK_GPIO_MODE | R/W | 0h | Disable ILLUM_EN_TX0 gating ILLUM_CLK going to GPIO.
0: ILLUM_CLK comes on GPIO only when ILLUM_EN (TG signal) is high | 1: ILLUM_CLK alive always |
14:13 | RESERVED | R/W | 0h | Always read or write 0h. |
12 | DIS_ILLUM_CLK_TX | R/W | 0h | Disable ILLUM_CLK going to transmitter
0: Clock to illumination driver is enabled. | 1: Clock to illumination driver is disabled |
11 | INVERT_AFE_CLK | R/W | 0h | Invert CLK input to AFE.
0: AFE CLK is not inverted | 1: AFE CLK is inverted. |
10 | RESERVED | R/W | 0h | Always read or write 0h. |
9 | INVERT_TG_CLK | R/W | 0h | Invert CLK input to timing generation unit.
0: TG CLK is not inverted | 1: TG CLK is inverted. |
8 | SHUT_CLOCKS | R/W | 0h | Shut down all CLK signals at modulation frequency.
0: Modulation clocks is alive | 1: Modulation clock is shut down. |
7 | RESERVED | R/W | 0h | Always read or write 0h. |
6:3 | SHIFT_ILLUM_PHASE | R/W | 0h | Shift the phase of ILLUM_CLK.
PHASE = SHIFT_ILLUM_PHASE × 22.5°. |
2 | DEALIAS_FREQ | R/W | 0h | Select modulation frequency when DEALIAS_EN = 1. This register works only when OVERRIDE_CLKGEN_REG = 1.
0: 10 × (6 / 7) MHz | 1: 10 × (6 / 5) MHz |
1 | DEALIAS_EN | R/W | 0h | Change the modulation frequency. This register works only when OVERRIDE_CLKGEN_REG = 1. |
0 | RESERVED | R/W | 0h | Always read or write 0h. |