JAJSLF3G
September 2006 – March 2021
PRODUCTION DATA
1
特長
2
説明
3
Revision History
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
I2C Interface Timing Requirements
5.7
RESET Timing Requirements
5.8
Switching Characteristics
5.9
Typical Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Functional Block Diagram
7.2
Device Functional Modes
7.2.1
RESET Input
7.2.1.1
RESET Errata
System Impact
System Workaround
7.2.2
Power-On Reset
7.2.3
I/O Port
7.2.4
Interrupt Output ( INT)
7.2.4.1
Interrupt Errata
System Impact
System Workaround
7.3
Programming
7.3.1
I2C Interface
7.4
Register Maps
7.4.1
Device Address
7.4.2
Control Register And Command Byte
7.4.3
Register Descriptions
7.4.4
Bus Transactions
7.4.4.1
Writes
7.4.4.2
Reads
8
Application Information Disclaimer
8.1
Application Information Disclaimer
8.2
Typical Application
8.2.1
Detailed Design Procedure
8.2.1.1
Minimizing ICC When I/Os Control Leds
9
Power Supply Recommendations
9.1
Power-On Reset Requirements
10
Device and Documentation Support
10.1
Receiving Notification of Documentation Updates
10.2
サポート・リソース
10.3
Trademarks
10.4
静電気放電に関する注意事項
10.5
用語集
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DGV|16
MPDS006C
DW|16
MSOI003I
PW|16
MPDS361A
DB|16
MPDS507A
サーマルパッド・メカニカル・データ
DW|16
QFND313D
発注情報
jajslf3g_oa
jajslf3g_pm