SBAS448B October   2008  – August 2015 PCM1690

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: Digital Input/Output
    6. 6.6  Electrical Characteristics: DAC
    7. 6.7  Electrical Characteristics: Power-Supply Requirements
    8. 6.8  System Clock Timing Requirements
    9. 6.9  Audio Interface Timing Requirements for Left-Justified, Right-Justified, and I2S Data Formats
    10. 6.10 Audio Interface Timing Requirements for DSP and TDM Data Formats
    11. 6.11 Three-Wire Serial Control Interface Timing Requirements
    12. 6.12 SCL and SDA Control Interface Timing Requirements
    13. 6.13 Typical Characteristics
      1. 6.13.1 Digital Filter
      2. 6.13.2 Digital De-Emphasis Filter
      3. 6.13.3 Dynamic Performance
      4. 6.13.4 Output Spectrum
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Analog Outputs
      2. 7.3.2  Voltage Reference VCOM
      3. 7.3.3  System Clock Input
      4. 7.3.4  Sampling Mode
      5. 7.3.5  Reset Operation
      6. 7.3.6  Zero Flag
      7. 7.3.7  AMUTE Control
      8. 7.3.8  Three-Wire (SPI) Serial Control
      9. 7.3.9  Control Data Word Format
      10. 7.3.10 Register Write Operation
      11. 7.3.11 Two-Wire (I2C) Serial Control
      12. 7.3.12 Packet Protocol
      13. 7.3.13 Write Operation
      14. 7.3.14 Read Operation
      15. 7.3.15 Timing Requirements: SCL and SDA
    4. 7.4 Device Functional Modes
      1. 7.4.1 Audio Serial Port Operation
      2. 7.4.2 Audio Data Interface Formats and Timing
      3. 7.4.3 Synchronization With the Digital Audio System
      4. 7.4.4 Mode Control
      5. 7.4.5 Parallel Hardware Control
    5. 7.5 Register Maps
      1. 7.5.1 Control Register Definitions (Software Mode Only)
      2. 7.5.2 Register Definitions
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Lowpass Filter and Differential-to-Single-Ended Converter for DAC Outputs
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Hardware Control Method
        2. 8.2.2.2 Audio Input
        3. 8.2.2.3 Audio Output
        4. 8.2.2.4 Master Clock
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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メカニカル・データ(パッケージ|ピン)
  • DCA|48
サーマルパッド・メカニカル・データ
発注情報

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.