JAJSNF5A April 2022 – September 2022 PCM1820-Q1 , PCM1821-Q1
PRODUCTION DATA
The PCM182(0/1)-Q1 signal chain is comprised of very-low-noise, high-performance, and low-power analog blocks and highly flexible and programmable digital processing blocks. The high performance and flexibility combined with a compact package makes the PCM182(0/1)-Q1 optimized for a variety of end-equipments and applications that require multichannel audio capture. Figure 8-7 shows a conceptual block diagram for the PCM1820-Q1 that highlights the various building blocks used in the signal chain, and how the blocks interact in the signal chain. The PCM1821-Q1 does not support DRE.
The front-end dynamic range enhancer (DRE) gain amplifier in the PCM1820-Q1 is very low noise, with a 123-dB dynamic range performance. Along with a low-noise and low-distortion, multibit, delta-sigma ADC, the front-end DRE gain amplifier enables the PCM1820-Q1 to record a far-field audio signal with very high fidelity, both in quiet and loud environments. Moreover, the ADC architecture has inherent antialias filtering with a high rejection of out-of-band frequency noise around multiple modulator frequency components. Therefore, the device prevents noise from aliasing into the audio band during ADC sampling. Further on in the signal chain, an integrated, high-performance multistage digital decimation filter sharply cuts off any out-of-band frequency noise with high stop-band attenuation.
The device supports an input signal bandwidth up to 80 kHz, which allows the high-frequency non-audio signal to be recorded by using a 176.4-kHz (or higher) sample rate.