JAJSFP5E July   2018  – February 2022 REF2025 , REF2030 , REF2033 , REF2041

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Solder Heat Shift
    2. 8.2 Long-Term Stability
    3. 8.3 Thermal Hysteresis
    4. 8.4 Noise Performance
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 VREF and VBIAS Tracking
      2. 9.3.2 Low Temperature Drift
      3. 9.3.3 Load Current
    4. 9.4 Device Functional Modes
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Low-Side, Current-Sensing Application
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Shunt Resistor
          2. 10.2.1.2.2 Differential Amplifier
          3. 10.2.1.2.3 Voltage Reference
          4. 10.2.1.2.4 Results
        3. 10.2.1.3 Application Curves
  11. 11Power-Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics

At TA = 25°C, IL = 0 mA, and VIN = 5 V, unless otherwise noted. Both VREF and VBIAS have the same specifications.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
ACCURACY AND DRIFT
Output voltage accuracy–0.05%0.05%
Output voltage temperature coefficient(1)–40°C ≤ TA ≤ 125°C±3±8ppm/°C
VREF and VBIAS tracking over temperature(2)–40°C ≤ TA ≤ 85°C±1.5±6ppm/°C
–40°C ≤ TA ≤ 125°C±2±7
LINE AND LOAD REGULATION
ΔVO(ΔVI)Line regulationVREF + 0.02 V ≤ VIN ≤ 5.5 V335ppm/V
ΔVO(ΔIL)Load regulationSourcing0 mA ≤ IL ≤ 20 mA ,
VREF + 0.6 V ≤ VIN ≤ 5.5 V		820ppm/mA
Sinking0 mA ≤ IL ≤ –20 mA,
VREF + 0.02 V ≤ VIN ≤ 5.5 V		820
POWER SUPPLY
ICCSupply currentActive mode360430µA
–40°C ≤ TA ≤ 125°C460
Shutdown mode3.35
–40°C ≤ TA ≤ 125°C9
Enable voltageDevice in shutdown mode (EN = 0)00.7V
Device in active mode (EN = 1)VIN – 0.7VIN
Dropout voltage1020mV
IL = 20 mA600
ISCShort-circuit current50mA
tonTurn-on time0.1% settling, CL = 1 µF500µs
NOISE
Low-frequency noise(3)0.1 Hz ≤ f ≤ 10 Hz12ppmPP
Output voltage noise densityf = 100 Hz0.25ppm/√ Hz
CAPACITIVE LOAD
Stable output capacitor range010µF
HYSTERESIS AND LONG TERM STABILITY
Long-term stability40 to 1000 hours

25

ppm
Output voltage hysteresis525°C, –40°C, 125°C, 25°CCycle 160ppm
Cycle 235
(1) Temperature drift is specified according to the box method. See the Section 9.3 section for more details.
(2) The VREF and VBIAS tracking over temperature specification is explained in more detail in the Section 9.3 section.
(3) The peak-to-peak noise measurement procedure is explained in more detail in the Section 8.4 section.
(4) Long-term stability measurement procedure is explained in more in detail in the Section 8.2 section.
(5) The thermal hysteresis measurement procedure is explained in more detail in the Section 8.3 section.