JAJSNM7B December   2021  – May 2024 REF35

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Electrical Characteristics YBH package
    7. 6.7 Typical Characteristics
  8. Parameter Measurement Information
    1. 7.1 Solder Heat Shift
    2. 7.2 Temperature Coefficient
    3. 7.3 Long-Term Stability
    4. 7.4 Thermal Hysteresis
    5. 7.5 Noise Performance
      1. 7.5.1 Low-Frequency (1/f) Noise
      2. 7.5.2 Broadband Noise
    6. 7.6 Power Dissipation
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Supply Voltage
      2. 8.3.2 EN Pin
      3. 8.3.3 NR Pin
    4. 8.4 Device Functional Modes
      1. 8.4.1 Basic Connections
      2. 8.4.2 Start-Up
      3. 8.4.3 Output Transient Behavior
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Negative Reference Voltage
      2. 9.2.2 Precision Power Supply and Reference
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Selection of Reference
          2. 9.2.2.2.2 Input and Output Capacitors
          3. 9.2.2.2.3 Selection of ADC
        3. 9.2.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Examples
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Output Transient Behavior

The REF35 output buffer is capable of sourcing 10mA load current as well as sink 5mA of load current. The output stage is designed using class AB architecture with ultra-low quiescent current. This architecture avoids the dead zone around the no load condition. The output buffer uses a fast start-up implementation to achieve 2ms typical turn-on time at CL = 1μF and no-load current condition.

Figure 8-3 and Figure 8-4show the output settling behavior for light load transient and high load transient respectively.

REF35 Load Transient Response
                        0μA to 100μA, CL = 1μFFigure 8-3 Load Transient Response 0μA to 100μA, CL = 1μF
REF35 Load Transient Response
                        1mA to 10mA, CL = 1μFFigure 8-4 Load Transient Response 1mA to 10mA, CL = 1μF