JAJSLW4F August   1984  – April 2021 SN54HC125 , SN74HC125

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics - 74
    6. 6.6  Electrical Characteristics - 54
    7. 6.7  Switching Characteristics - 74
    8. 6.8  Switching Characteristics - 54
    9. 6.9  Operating Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS 3-State Outputs
      2. 8.3.2 Standard CMOS Inputs
      3. 8.3.3 Clamp Diode Structure
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • J|14
  • FK|20
サーマルパッド・メカニカル・データ
発注情報

6.4 Thermal Information

THERMAL METRIC(1)SN74HC125UNIT
D (SOIC)DB (SSOP)N (PDIP)NS (SO)PW (TSSOP)
14 PINS14 PINS14 PINS14 PINS14 PINS
RθJAJunction-to-ambient thermal resistance133.6 108.063.0122.6151.7°C/W
RθJC(top)Junction-to-case (top) thermal resistance8957.850.781.879.4°C/W
RθJBJunction-to-board thermal resistance89.558.342.783.894.7°C/W
ΨJTJunction-to-top characterization parameter45.518.030.345.425.2°C/W
ΨJBJunction-to-board characterization parameter89.157.642.583.494.1°C/W
RθJC(bot)Junction-to-case (bottom) thermal resistanceN/AN/AN/AN/AN/A°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.