JAJSOJ7F December   1982  – April 2022 SN54HC273 , SN74HC273

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings – SN74HC273
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Electrical Characteristics – SN54HC273
    7. 6.7  Electrical Characteristics – SN74HC273
    8. 6.8  Timing Requirements
    9. 6.9  Timing Requirements – SN54HC273
    10. 6.10 Timing Requirements – SN74HC273
    11. 6.11 Switching Characteristics
    12. 6.12 Switching Characteristics – SN54HC273
    13. 6.13 Switching Characteristics – SN74HC273
    14. 6.14 Operating Characteristics
    15. 6.15 Typical Characteristics
  7. 7 Parameter Measurement Information
    1.     23
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • W|20
  • J|20
  • FK|20
サーマルパッド・メカニカル・データ
発注情報

6.9 Timing Requirements – SN54HC273

over recommended operating free-air temperature range (unless otherwise noted)
MINMAXUNIT
fclockClock frequencyVCC = 2 V4MHz
VCC = 4.5 V18
VCC = 6 V21
twPulse durationCLR lowVCC = 2 V120ns
VCC = 4.5 V24
VCC = 6 V20
CLK high or lowVCC = 2 V120
VCC = 4.5 V24
VCC = 6 V20
tsuSetup time before CLK↑DataVCC = 2 V150ns
VCC = 4.5 V30
VCC = 6 V25
CLR inactiveVCC = 2 V150
VCC = 4.5 V30
VCC = 6 V25
thHold time, data after CLK↑VCC = 2 V0ns
VCC = 4.5 V0
VCC = 6 V0