JAJSP47H March 1984 – December 2022 SN54HCT245 , SN74HCT245
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | DIR | I | Direction select. High = A to B, Low = B to A |
2 | A1 | I/O | Channel 1 port A |
3 | A2 | I/O | Channel 2 port A |
4 | A3 | I/O | Channel 3 port A |
5 | A4 | I/O | Channel 4 port A |
6 | A5 | I/O | Channel 5 port A |
7 | A6 | I/O | Channel 6 port A |
8 | A7 | I/O | Channel 7 port A |
9 | A8 | I/O | Channel 8 port A |
10 | GND | — | Ground |
11 | B8 | O/I | Channel 8 port B |
12 | B7 | O/I | Channel 7 port B |
13 | B6 | O/I | Channel 6 port B |
14 | B5 | O/I | Channel 5 port B |
15 | B4 | O/I | Channel 4 port B |
16 | B3 | O/I | Channel 3 port B |
17 | B2 | O/I | Channel 2 port B |
18 | B1 | O/I | Channel 1 port B |
19 | OE | I | Output enable, active low. High = all ports in high impedance mode, Low = all ports active |
20 | VCC | — | Power supply |