JAJSTH9W January   1993  – July 2024 SN54LVC08A , SN74LVC08A

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions, SN54LVC08A
    4. 5.4  Recommended Operating Conditions, SN74LVC08A
    5. 5.5  Thermal Information
    6. 5.6  Electrical Characteristics, SN54LVC08A
    7. 5.7  Electrical Characteristics, SN74LVC08A
    8. 5.8  Switching Characteristics, SN54LVC08A
    9. 5.9  Switching Characteristics, SN74LVC08A
    10. 5.10 Operating Characteristics
    11. 5.11 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced High-Drive CMOS Push-Pull Outputs
      2. 7.3.2 Standard CMOS Inputs
      3. 7.3.3 Clamp Diodes
      4. 7.3.4 Over-voltage Tolerant Inputs
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3.     Power Supply Recommendations
    4. 8.3 Layout
      1. 8.3.1 Layout Guidelines
      2. 8.3.2 Layout Examples
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support (Analog)
      1. 9.1.1 Related Documentation
      2. 9.1.2 Related Links
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 サポート・リソース
      1. 9.3.1 Community Resources
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 1048
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • J|14
  • FK|20
  • W|14
サーマルパッド・メカニカル・データ
発注情報

4 Pin Configuration and Functions

SN54LVC08A SN74LVC08A D, DB, NS, J, W, or PW Package14-Pin SOIC, SSOP, SOP, CDIP, or TSSOP(Top View)Figure 4-1 D, DB, NS, J, W, or PW Package14-Pin SOIC, SSOP, SOP, CDIP, or TSSOP(Top View)
SN54LVC08A SN74LVC08A BQA or RGY Package14-Pin WQFN or VQFN(Top View)Figure 4-2 BQA or RGY Package14-Pin WQFN or VQFN(Top View)
SN54LVC08A SN74LVC08A FK Package20-Pin LCCC(Top View) Figure 4-3 FK Package20-Pin LCCC(Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME SOIC, SSOP, SOP, CDIP, TSSOP, VQFN,WQFN LCCC
1A 1 2 I Channel 1 input A
1B 2 3 I Channel 1 input B
1Y 3 4 O Channel 1 output
2A 4 6 I Channel 2 input A
2B 5 8 I Channel 2 input B
2Y 6 9 O Channel 2 output
GND 7 10 Ground Ground
3Y 8 12 O Channel 3 output
3A 9 13 I Channel 3 input A
3B 10 14 I Channel 3 input B
4Y 11 16 O Channel 4 output
4A 12 18 I Channel 4 input A
4B 13 19 I Channel 4 input B
VCC 14 20 Power Positive supply
Thermal Information(1) — The thermal pad can be connected to GND or left floating. Do not connect to any other signal or supply.
NC(2) — 1 — No connect
5
7
11
15
17
(1) For BQA package only.
(2) NC – No internal connection