JAJSTH9W January   1993  – July 2024 SN54LVC08A , SN74LVC08A

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions, SN54LVC08A
    4. 5.4  Recommended Operating Conditions, SN74LVC08A
    5. 5.5  Thermal Information
    6. 5.6  Electrical Characteristics, SN54LVC08A
    7. 5.7  Electrical Characteristics, SN74LVC08A
    8. 5.8  Switching Characteristics, SN54LVC08A
    9. 5.9  Switching Characteristics, SN74LVC08A
    10. 5.10 Operating Characteristics
    11. 5.11 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced High-Drive CMOS Push-Pull Outputs
      2. 7.3.2 Standard CMOS Inputs
      3. 7.3.3 Clamp Diodes
      4. 7.3.4 Over-voltage Tolerant Inputs
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3.     Power Supply Recommendations
    4. 8.3 Layout
      1. 8.3.1 Layout Guidelines
      2. 8.3.2 Layout Examples
  10. Device and Documentation Support
    1. 9.1 Documentation Support (Analog)
      1. 9.1.1 Related Documentation
      2. 9.1.2 Related Links
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 サポート・リソース
      1. 9.3.1 Community Resources
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 1048
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • J|14
  • FK|20
  • W|14
サーマルパッド・メカニカル・データ
発注情報

Thermal Information

THERMAL METRIC(1) SN74LVC08A UNIT
BQA (WQFN) D
(SOIC)
DB
(SSOP)
NS
(SO)
PW
(TSSOP)
RGY
(LCCC)
14 PINS 14 PINS 14 PINS 14 PINS 14 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 102.3 127.8 140.4 123.8 150.8 92.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 96.8 81.9 65.3 52.7 56.0 56.6 °C/W
RθJB Junction-to-board thermal resistance 70.9 84.4 60.2 53.9 69.5 27.5 °C/W
ψJT Junction-to-top characterization parameter 16.6 39.6 25.3 17.9 8.9 4.5 °C/W
ψJB Junction-to-board characterization parameter 70.9 83.9 59.6 53.6 68.9 27.7 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 50.1 N/A N/A N/A N/A 19.1 °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.