JAJSTF5U January   1993  – July 2024 SN54LVC32A , SN74LVC32A

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions, SN54LVC32A
    4. 5.4  Recommended Operating Conditions, SN74LVC32A
    5. 5.5  Thermal Information
    6. 5.6  Electrical Characteristics, SN54LVC32A
    7. 5.7  Electrical Characteristics, SN74LVC32A
    8. 5.8  Switching Characteristics, SN54LVC32A
    9. 5.9  Switching Characteristics, SN74LVC32A
    10. 5.10 Operating Characteristics
    11. 5.11 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9.   Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3.     Power Supply Recommendations
    4. 8.3 Layout
      1. 8.3.1 Layout Guidelines
      2. 8.3.2 Layout Example
  10. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Links
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 サポート・リソース
      1. 8.3.1 Community Resources
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  11. Revision History
  12. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • J|14
  • FK|20
  • W|14
サーマルパッド・メカニカル・データ
発注情報

Layout Guidelines

When using multiple bit logic devices inputs should never float.

In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Section 8.3.2 specifies the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC, whichever makes more sense or is more convenient. It is generally acceptable to float outputs, unless the part is a transceiver.