JAJSPA1I
June 1999 – October 2022
SN65C3243
,
SN75C3243
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Electrical Characteristics, Driver Section
6.7
Electrical Characteristics, Receiver Section
6.8
Electrical Characteristics, Auto-Powerdown Section
6.9
Switching Characteristics: Driver
6.10
Switching Characteristics: Receiver
6.11
Switching Characteristics: Auto-Powerdown
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Device Functional Modes
8.2.1
Function Tables
9
Device and Documentation Support
9.1
Device Support
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
Trademarks
9.5
静電気放電に関する注意事項
9.6
用語集
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DW|28
MPDS175A
DB|28
MPDS510A
PW|28
MPDS364
サーマルパッド・メカニカル・データ
DW|28
QFND317C
発注情報
jajspa1i_oa
jajspa1i_pm
7
Parameter Measurement Information
A.
C
L
includes probe and jig capacitance.
B.
The pulse generator has the following characteristics: PRR = 1 Mbits, Z
O
= 50 Ω , 50% duty cycle, t
r
≤ 10 ns, t
f
≤ 10 ns.
Figure 7-1
Driver Slew Rate
A.
C
L
includes probe and jig capacitance.
B.
The pulse generator has the following characteristics: PRR = 1 Mbits, Z
O
= 50 Ω , 50% duty cycle, t
r
≤ 10 ns, t
f
≤ 10 ns.
Figure 7-2
Driver Pulse Skew
A.
C
L
includes probe and jig capacitance.
B.
The pulse generator has the following characteristics: Z
O
= 50 Ω , 50% duty cycle, t
r
≤ 10 ns, t
f
≤ 10 ns.
Figure 7-3
Receiver Propagation Delay Times
A.
C
L
includes probe and jig capacitance.
B.
The pulse generator has the following characteristics: Z
O
= 50 Ω , 50% duty cycle, t
r
≤ 10 ns, t
f
≤ 10 ns.
C.
t
PLZ
and t
PHZ
are the same as t
dis
.
D.
t
PZL
and t
PZH
are the same as t
en
.
Figure 7-4
Receiver Enable and Disable Times
A.
C
L
includes probe and jig capacitance.
B.
The pulse generator has the following characteristics: PRR = 5 Mbits, Z
O
= 50 Ω , 50% duty cycle, t
r
≤ 10 ns, t
f
≤ 10 ns.
Figure 7-5
INVALID
Propagation Delay Times and Supply Enabling Time
† C3 can be connected to V
CC
or GND.
A.
Resistor values shown are nominal.
Figure 7-6
Typical Operating Circuit and Capacitor Values
Table 7-1 V
CC
vs Capacitor Values
V
CC
C1
C2, C3, and C4
3.3 V ± 0.3 V
0.1 µF
0.1 µF
5 V ± 0.5 V
0.047 µF
0.33 µF
3 V to 5.5 V
0.1 µF
0.47 µF