These devices are designed to operate in hot swap or hot-pluggable applications. Key features for hot-pluggable applications are power-up and power-down glitch free operation, default disabled input and output pins, and receiver failsafe.

As shown in the Functional Block Diagram, an internal power-on reset circuit keeps the driver outputs in a high impedance state until the supply voltage has reached a level at which the device will reliably operate. This circuit makes sure no problems occur on the bus pin outputs as the power supply turns on or off.

As shown in Device Functional Modes, the driver and receiver enable inputs (DE and RE) are disabled by default. This default makes sure the device neither drives the bus nor reports data on the R pin until the associated controller actively drivers the enable pins.