SLLS933G November   2008  – January 2015 SN65HVD233-HT

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (Continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Driver Electrical Characteristics
    6. 7.6  Receiver Electrical Characteristics
    7. 7.7  Driver Switching Characteristics
    8. 7.8  Receiver Switching Characteristics
    9. 7.9  Device Switching Characteristics
    10. 7.10 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 ISO 11898 Compliance of SN65HVD23x Family of 3.3-V CAN Transceivers
        1. 9.3.1.1 Differential Signal
          1. 9.3.1.1.1 Common-Mode Signal
        2. 9.3.1.2 Interoperability Of 3.3-V CAN in 5-V CAN Systems
    4. 9.4 Device Functional Modes
      1. 9.4.1 Function Tables
      2. 9.4.2 Equivalent Input and Output Schematic Diagrams
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Diagnostic Loopback
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Slope Control
        2. 10.2.2.2 Standby
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

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10 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

10.1 Application Information

10.1.1 Diagnostic Loopback

The loopback (LBK) function of the SN65HVD233 is enabled with a high-level input to pin 5. This forces the driver into a recessive state and redirects the data (D) input at pin 1 to the received-data (R) output at pin 4. This allows the host controller to input and read back a bit sequence to perform diagnostic routines without disturbing the CAN bus. A typical CAN bus application is displayed in Figure 34.

If the LBK pin is not used, it may be tied to ground (GND). However, it is pulled low internally (defaults to a low-level input) and may be left open if not in use.

10.2 Typical Application

ai_typapp_lls557.gifFigure 34. Typical SN65HVD233 Application

10.2.1 Design Requirements

The High-Speed ISO 11898 Standard specifications are given for a maximum signaling rate of 1 Mbps with a bus length of 40 m and a maximum of 30 nodes. It also recommends a maximum un-terminated stub length of 0.3 m. The cable is specified to be a shielded or unshielded twisted-pair with a 120-W characteristic impedance (ZO). The Standard defines a single line of twisted-pair cable with the network topology as shown in Figure 34. It is terminated at both ends with 120-W resistors, which match the characteristic impedance of the line to prevent signal reflections. According to ISO 11898, placing RL on a node should be avoided because the bus lines lose termination if the node is disconnected from the bus.

10.2.2 Detailed Design Procedure

Table 5. Suggested Cable Length vs Signaling Rate

BUS LENGTH (m) SIGNALING RATE (Mbps)
40 1
100 0.5
200 0.25
500 0.10
1000 0.05

Basically, the maximum bus length is determined by, or rather is a trade-off with the selected signaling rate as listed in Table 5.

A signaling rate decreases as transmission distance increases. While steady-state losses may become a factor at the longest transmission distances, the major factors limiting signaling rate as distance is increased are time varying. Cable bandwidth limitations, which degrade the signal transition time and introduce inter-symbol interference (ISI), are primary factors reducing the achievable signaling rate when transmission distance is increased.

For a CAN bus, the signaling rate is also determined from the total system delay – down and back between the two most distant nodes of a system and the sum of the delays into and out of the nodes on a bus with the typical 5ns/m prop delay of a twisted-pair cable. Also, consideration must be given the signal amplitude loss due to resistance of the cable and the input resistance of the transceivers. Under strict analysis, skin effects, proximity to other circuitry, dielectric loss, and radiation loss effects all act to influence the primary line parameters and degrade the signal.

A conservative rule of thumb for bus lengths over 100 m is derived from the product of the signaling rate in Mbps and the bus length in meters, which should be less than or equal to 50.

Signaling Rate (Mbps) × Bus Length (m) <= 50. Operation at extreme temperatures should employ additional conservatism.

10.2.2.1 Slope Control

The rise and fall slope of the SN65HVD233 driver output can be adjusted by connecting a resistor from Rs (pin 8) to ground (GND), or to a low-level input voltage (see Figure 35).

The slope of the driver output signal is proportional to the output current of the pin. This slope control is implemented with an external resistor value of 10 kΩ to achieve a ≉15-V/μs slew rate, and up to 100 kΩ to achieve a ≉2.0- V/μs slew rate (see Figure 36). Typical driver output waveforms with slope control are displayed in Figure 37.

slopecont_lls933.gifFigure 35. Slope Control/Standby Connection to DSP

10.2.2.2 Standby

If a high-level input (>0.75 VCC) is applied to Rs, the circuit enters a low-current, listen-only standby mode, during which the driver is switched off and the receiver remains active. The local controller can reverse this low-power standby mode when the rising edge of a dominant state (bus differential voltage >900 mV typical) occurs on the bus.

10.2.3 Application Curves

ai_driver_lls557.gif
Figure 36. SN65HVD233 Driver Output Signal Slope vs Slope Control Resistance Value
ai_typout_lls557.gif
Figure 37. Typical SN65HVD233 250-kbps Output Pulse Waveforms With Slope Control