JAJSGJ1H November 2002 – November 2018 SN65HVD233 , SN65HVD234 , SN65HVD235
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
t(LBK) | Loopback delay, driver input to receiver output | HVD233 | See Figure 23 | 7.5 | 12 | ns | |
t(AB1) | Loopback delay, driver input to receiver output | HVD235 | See Figure 24 | 10 | 20 | ns | |
t(AB2) | Loopback delay, bus input to
receiver output |
See Figure 25 | 35 | 60 | ns | ||
t(loop1) | Total loop delay, driver input to receiver output, recessive to dominant | RS at 0 V, See Figure 22 | 70 | 135 | ns | ||
RS with 10 kΩ to ground, See Figure 22 | 105 | 190 | |||||
RS with 100 kΩ to ground, See Figure 22 | 535 | 1000 | |||||
t(loop2) | Total loop delay, driver input to receiver output, dominant to recessive | RS at 0 V, See Figure 22 | 70 | 135 | ns | ||
RS with 10 kΩ to ground, See Figure 22 | 105 | 190 | |||||
RS with 100 kΩ to ground, See Figure 22 | 535 | 1000 |