JAJSGJ1H November   2002  – November 2018 SN65HVD233 , SN65HVD234 , SN65HVD235

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      ブロック図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Power Dissipation Ratings
    6. 8.6  Electrical Characteristics: Driver
    7. 8.7  Electrical Characteristics: Receiver
    8. 8.8  Switching Characteristics: Driver
    9. 8.9  Switching Characteristics: Receiver
    10. 8.10 Switching Characteristics: Device
    11. 8.11 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagrams
    3. 10.3 Feature Description
      1. 10.3.1 Diagnostic Loopback (SN65HVD233)
      2. 10.3.2 Autobaud Loopback (SN65HVD235)
      3. 10.3.3 Slope Control
      4. 10.3.4 Standby
      5. 10.3.5 Thermal Shutdown
    4. 10.4 Device Functional Modes
      1. 10.4.1 Driver and Receiver
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
        1. 11.2.1.1 Bus Loading, Length and Number of Nodes
        2. 11.2.1.2 CAN Termination
      2. 11.2.2 Detailed Design Procedure
      3. 11.2.3 Application Curve
    3. 11.3 System Example
      1. 11.3.1 ISO 11898 Compliance of SN65HVD23x Family of 3.3-V CAN Transceivers
        1. 11.3.1.1 Introduction
        2. 11.3.1.2 Differential Signal
        3. 11.3.1.3 Common-Mode Signal
        4. 11.3.1.4 Interoperability of 3.3-V CAN in 5-V CAN Systems
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14デバイスおよびドキュメントのサポート
    1. 14.1 関連リンク
    2. 14.2 ドキュメントの更新通知を受け取る方法
    3. 14.3 コミュニティ・リソース
    4. 14.4 商標
    5. 14.5 静電気放電に関する注意事項
    6. 14.6 Glossary
  15. 15メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • D|8
サーマルパッド・メカニカル・データ
発注情報

8.7 Electrical Characteristics: Receiver

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VIT+ Positive-going input threshold voltage AB at 0 V, LBK at 0 V, EN at VCC, See Table 1 750 900 mV
VIT– Negative-going input threshold voltage 500 650
Vhys Hysteresis voltage (VIT+ – VIT–) 100
VOH High-level output voltage IO = –4 mA, See Figure 17 2.4 V
VOL Low-level output voltage IO = 4 mA, See Figure 17 0.4
II Bus input current CANH or CANL at 12 V Other bus pin at 0 V,
D at 3 V, AB at 0 V,
LBK at 0 V, RS at 0 V,
EN at VCC 		150 500 μA
CANH or CANL at 12 V,
VCC at 0 V		 200 600
CANH or CANL at –7 V –610 –150
CANH or CANL at –7 V,
VCC at 0 V		 –450 –130
CI Input capacitance (CANH or CANL) Pin-to-ground, VI = 0.4 sin (4E6πt) + 0.5 V, D at 3 V,
AB at 0 V, LBK at 0 V, EN at VCC 		40 pF
CID Differential input capacitance Pin-to-pin, VI = 0.4 sin (4E6πt) + 0.5 V, D at 3 V,
AB at 0 V, LBK at 0 V, EN at VCC 		20
RID Differential input resistance D at 3 V, AB at 0 V, LBK at 0 V, EN at VCC 40 100 kΩ
RIN Input resistance (CANH or CANL) to ground 20 50
ICC Supply current Sleep EN at 0 V, D at VCC, RS at 0 V or VCC 0.05 2 μA
Standby RS at VCC, D at VCC, AB at 0 V, LBK at 0 V, EN at VCC 200 600
Dominant D at 0 V, No Load, RS at 0 V, LBK at 0 V, AB at 0 V,
EN at VCC 		6 mA
Recessive D at VCC, No Load, RS at 0 V, LBK at 0 V, AB at 0 V,
EN at VCC 		6
(1) All typical values are at 25°C and with a 3.3-V supply.