JAJSPU9M september   2005  – february 2023 SN65HVD30 , SN65HVD31 , SN65HVD32 , SN65HVD33 , SN65HVD34 , SN65HVD35

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison
    1.     6
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: Driver
    6. 7.6  Electrical Characteristics: Receiver
    7. 7.7  Device Power Dissipation – PD
    8. 7.8  Supply Current Characteristics
    9. 7.9  Switching Characteristics: Driver
    10. 7.10 Switching Characteristics: Receiver
    11. 7.11 Dissipation Ratings
    12. 7.12 Typical Characteristics
      1.      Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Low-Power Standby Mode
      2. 8.3.2 Driver Output Current Limiting
      3. 8.3.3 Hot-Plugging
      4. 8.3.4 Receiver Failsafe
      5. 8.3.5 Safe Operation With Bus Contention
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 ドキュメントの更新通知を受け取る方法
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.10 Switching Characteristics: Receiver

over recommended operating conditions unless otherwise noted
PARAMETERTEST CONDITIONSMINTYP(1)MAXUNIT
tPLHPropagation delay time, low-to-high-level outputSN65HVD30, SN65HVD33VID = –1.5 V to 1.5 V,
CL = 15 pF, See Figure 8-10		2645ns
SN65HVD31, SN65HVD32, SN65HVD34, SN65HVD354770ns
tPHLPropagation delay time, high-to-low-level outputSN65HVD30, SN65HVD332945ns
SN65HVD31, SN65HVD32, SN65HVD34, SN65HVD354970ns
tsk(p)Pulse skew (|tPHL – tPLH|)SN65HVD30, SN65HVD337ns
SN65HVD31, SN65HVD34, SN65HVD32, SN65HVD3510ns
trOutput signal rise time5ns
tfOutput signal fall time6ns
tPHZOutput disable time from high levelDE at 3 VCL = 15 pF,
See Figure 8-11		20ns
tPZH1Output enable time to high level20ns
tPZH2Propagation delay time, standby-to-high-level outputDE at 0 V4000ns
tPLZOutput disable time from low levelDE at 3 VCL = 15 pF,
See Figure 8-12		20ns
tPZL1Output enable time to low level20ns
tPZL2Propagation delay time, standby-to-low-level outputDE at 0 V4000ns
(1) All typical values are at 25°C and with a 3.3-V supply.