JAJSPU8F june   2004  – february 2023 SN65HVD485E

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
    1.     6
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: Driver
    6. 7.6  Electrical Characteristics: Receiver
    7. 7.7  Power Dissipation Characteristics
    8. 7.8  Supply Current
    9. 7.9  Switching Characteristics: Driver
    10. 7.10 Switching Characteristics: Receiver
    11. 7.11 Dissipation Ratings
    12. 7.12 Typical Characteristics
      1.      Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Receiver Failsafe
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Usage in an RS-485 Transceiver
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Device Nomenclature
        1. 10.1.1.1 Thermal Characteristics of IC Packages
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.6 Electrical Characteristics: Receiver

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VIT+ Positive-going input threshold voltage IO = –8 mA –85 –10 mV
VIT– Negative-going input threshold voltage IO = 8 mA –200 –115 mV
Vhys Hysteresis voltage (VIT+ – VIT–) 30 mV
VOH High-level output voltage VID = 200 mV, IOH = –8 mA (see Figure 8-8) 4 4.6 V
VOL Low-level output voltage VID = –200 mV, IOH = 8 mA (see Figure 8-8) 0.15 0.4 V
IOZ High-impedance-state output current VO = 0 to VCC, RE = VCC –1 1 μA
II Bus input current VIH = 12 V, VCC = 5 V 0.5 mA
VIH = 12 V, VCC = 0 0.5
VIH = –7 V, VCC = 5 V –0.4
VIH = –7 V, VCC = 0 –0.4
IIH High-level input current ( RE) VIH = 2 V –60 –30 μA
IIL Low-level input current ( RE) VIL = 0.8 V –60 –30 μA
Cdiff Differential input capacitance VI = 0.4 sin (4E6πt) + 0.5 V, DE at 0 V 7 pF
(1) All typical values are at 25°C and with a 5-V supply.